How to modify the ADI official FPGA-based ad7768evb project code multi-channel AD7768 synchronous acquisition reference project？

Hi,

I am currently looking into this and will get back to you.

Thanks,
Janine

Thanks

您好，您找到参考项目了吗？期待您的回复

Hi BoyaException2251 ,

Apologies for the delay. I am communicating with the software team to check this and will get back.

Thanks,
Janine

Hello BoyaException2251,

I think the appropriate approach in this case is to keep the AXI_AD7768 interface IP as it is and instantiate four of them into the design. To accomplish the synchronization between all the channels, there are two possible wiring schemes described in the datasheet (Figure 110 and Figure 111). It might be easier to use the Figure 110 configuration, as the synchronization is issued through SPI and not through a signal (as in Figure 111), which has to be synchronous with the IC’s clock. If these options are not feasible, another one would be to connect the converters in daisy-chaining mode (datasheet Figure 109) and rescale the adc_data_p register and the adc_cnt_value to accommodate all the received data. After that, you will need to assign the correct bits of the adc_data_p to the data channel’s register adc_data_s.

Please let me know if these options could work for you.

Thanks,

Paul

Hello, does it mean to keep the AXI_AD7768 interface IP and add 4 AXI_AD7768 interface IPs? 4 AD7768s require 4 AD7768 drivers? Because I have 4 AD7768s to support 32 channels, the data packing IP provided by ADI supports 64 channels. Using the packing IP, can it be transferred to DMA at one time? How can I distinguish which channel the data I collected belongs to?
My idea is that if I collect 8-channel data, then I will pack the 8-channel data to DAM, and if I collect 16-channel data, then I will pack the 16-channel data to DAM. Is it possible?

Hello BoyaException2251,

Yes, it is possible to connect all the AXI_AD7768 outputs to a CPACK module as the CPACK supports 32 channels and the DMA input width can be configured to 1024, but you will need to update the AD7768 Linux driver or the No-OS project. The updates don’t seem trivial, as the converters will be seen as a single device in IIO, and you will have to ensure that all four IPs are configured correctly. If resource utilization is not a critical constraint, you could instantiate four CPACKs and four DMAs and treat them separately.

Thanks,

Paul

Hi, I downloaded the CPACK module from GitHub and got an error. See the image for details。  I need to customize the CPACK module. When I regenerate a new CPACK module IP core, a serious warning occurs and the submodule fails to be serialized. Can you send a verified CPACK module to my email? Tomhardy721@2925.com Thank you

Hello, JEstayo please help me solve the current problem, no one responded to me

Hello BoyaException2251 ,

1. What were the steps that you performed to get these errors?

2. What are the customizations that you need?

3. The files you highlighted as instantiation errors are sourced by the IP, but the modules are used depending on the IP parameters. For example, the ad_perfect_shuffle module is instantiated only if NON_POWER_OF_TWO == 1 && PACK == 0.

4. If you only need to increase the number of channels, I recommend building the ad7768 project using make. Then, double-click on the adc_pack IP, increase the number of channels to 64, and connect the enables and fifo_wr_data to the corresponding ports. I don’t think you need to repackage the IP for this.

Thanks,

Paul