Hello,
We are using the LTC2387-18 for 18 bit A2D conversion using 2 lane mode for an imaging sensor application.
Each pixel of the analog sensor is being sampled synchronously using a 8 MHz clock which results in a readout window of 125 ns for each pixel. (This is the criteria).
Each pixel's (differential) output is fed into the LTC2387-18's (differential) input.
In line with the LTC2387-18's degrees of constraints and freedom as provided in the datasheet and timing diagram as well as to meet the criteria as mentioned above, we have calculated the input clock to the LTC2387-18 to be 200 MHz as appropriate. (200 MHz seems ideal and optimum but can be managed at 50 MHz and 100 MHz with some difficulty & complications on the FPGA side). The LTC2387-18 shall be operated in 2 lane mode for 18 bit output.
Based on the 200 MHz input clock to the LTC2387-18 we are sending a CNV signal at the rising edge of the 200 MHz for a duration of 1 clock cycle (5ns) (we can afford to send the CNV pulse for a duration of 25ns i.e 5 clock cycles).
The following are the queries:
a) Can the LTC2387-18 handle the 200 MHz clock as input clock?
b) Do we explicitly "latch" the FPGA's input onto the DCO output of the LTC2387-18 and would the DCO return the output to LOW (0) after the burst of 5 clock pulses are sent to the ADC?
c) Do we need to read the LTC2387-18's outputs at DA+/- and DB+/- using the latched DCO as the input reference clock?
d) Can the FPGA latch onto the DA+/- and DB+/- of the ADC for the output? (Since the timing diagram shows that the the DA+/- and DB+/- are forced to LOGIC 0 after the output is completed and thereby we presume that the enforced LOGIC 0 is the default state to bailout from the latched condition)
e) The D[17] and D[16] bits become available immediately after the mandatory waiting period (allocated for S&H/Buffer/Multiplex etc). Can we read the D[17] and D[16] bits before we send the burst of 5 CLK pulses i.e. before the first pulse of the DCO becomes available?
Looking forward to the responses for the above>
Regards
Kingshuk
