Output data format

Hi Electronik ,

Can you please clarify some of the details below. Thanks

1. What is your input voltage?

2. Can you clarify on your scope where is the 16 bits samples that you see?

Thanks,
Janine

Hi JEstayo.
1. one input is currently switched on and no input voltage is applied to it. according to the datasheet, when the input is turned off, zeros should be transmitted. I used this configuration so that the picture on the logic analyzer was more understandable for perception. Also, to the input of the first channel, I applied a sine with a frequency of 50 Hz and an amplitude of 2.5 V (the input part of the channel is modified), but through the pins DOUT0-DOUT3 I get 16-bit samples.
2. Through the DOUT0-DOUT3 data interface, where the ADC acts as a master, I receive 16-bit samples regardless of the configuration and applied voltage to the channels. When reading data through the SPI interface in the Σ-Δ data conversion mode, I receive 24-bit samples.
I also see errors that may lead to this behavior of the ADC, but I do not know how to eliminate them.
In the register GENERAL ERRORS REGISTER 1 (address 0x59) - error ROM_CRC_ERR
In the registers ERROR STATUS REGISTER 1-3 (address 0x5D - 0x5F) - error CHIP_ERROR

Hi Electronik 

For each channel, the width is 32 bits long.

By default, when 4 DOUT lines are used, I observed 8 bytes (64 bits)

2 Channels * 32 bits = 64 bits

I tried to configure the Data Out Format to use 1 DOUT line only, and observed 32 bytes (256 data bits)

8 channels * 32 bits

Can you please confirm this?

Thanks,
Janine

Hi JEstayo

I can't confirm that.
I set the output format to use only 1 DOUT line and I get 24 bytes (192 bits). The screenshot shows the data captured by the logic analyzer that I get on the DOUT1 line. for some reason the ADC transmits 24 bits per channel.

Hi Electronik ,

Thanks for sending this.  

I tried to use the same DCLK frequency, ODR 1 DOUT pin, same as yours, and I still see 32 bits in between the headers.

The DCLK_DIV you you want to use is 4 and the ODR is 4,807Hz, can you confirm?

Can you reset the device, configure the registers and readback the status bits again?

Thanks,
Janine

Hi JEstayo,

Unfortunately, I will not be able to do it. We had the AD7770ACPZ chip in stock, we replaced the chip on the EVAL-AD777xFMCZ board and I now get 32 bits between headers on line 1 DOUT, which corresponds to the datasheet.
Errors in the GENERAL ERRORS REGISTER 1 (address 0x59) - ROM_CRC_ERR (bit 4) and ERROR STATUS REGISTER 1-3 (address 0x5D - 0x5F) - CHIP_ERROR (bit 5) registers also disappeared.

Hi Electronik ,

That's good to hear. Please feel free to post another thread if you have other questions. 

Thanks,
Janine