Currently using AD7960, but for the application the AD7961 would be just fine.
The problem is the controller issues 21 clocks (self cloked mode) per Fig. 37 of AD7960's data sheet. What happens if I feed the AD7961 with these two extra clocks?
AD7961
Production
The AD7961 is a 16-bit, 5 MSPS charge redistribution successive approximation (SAR), analog-to-digital converter (ADC). The SAR architecture allows unmatched...
Datasheet
AD7961 on Analog.com
AD7960
Production
The AD7960 is an 18-bit, 5 MSPS charge redistribution successive approximation (SAR), analog-to-digital converter (ADC). The SAR architecture allows unmatched...
Datasheet
AD7960 on Analog.com
AD7691
Production
The AD7691 is an 18-bit, charge redistribution, successive approximation, analog-to-digital converter (ADC) that operates from a single power supply, VDD...
Datasheet
AD7691 on Analog.com
Currently using AD7960, but for the application the AD7961 would be just fine.
The problem is the controller issues 21 clocks (self cloked mode) per Fig. 37 of AD7960's data sheet. What happens if I feed the AD7961 with these two extra clocks?
Hi EVC2024 ,
We only recommend what is on its datasheet since this is where they met their optimal performance. So, implementing the timing of AD7960 to AD7691 is not recommended as it may produce instability of the device.
Thanks and regards,
Jo
Hi EVC2024 ,
We only recommend what is on its datasheet since this is where they met their optimal performance. So, implementing the timing of AD7960 to AD7691 is not recommended as it may produce instability of the device.
Thanks and regards,
Jo