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LTC2508-32 SDOA pin output waveform is abnormal

Category: Hardware
Product Number: LTC2508-32


I use LTC2508-32 ADC, VDD=2.5V, OVDD=3.3V, RDLA=0.  At this time the SDOA output waveform is very strange, the binary conversion value is not correct, what is the reason?  

The following are some schematic diagrams and waveform diagrams 


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  • Dear Jo:

          Fixed, because three LTC2508-32 pin 1 RDLA tablet selection problem, initially two LTC2508-32 valid, has been corrected.

    Another issue: for pin 14 SYNC of LTC2508-32, the specification says that SYNC should be completed in one MCLK cycle.  But MCLK is 1M, the time between two MCLKS is 1us, the falling edge of DRL is almost 650ns, MCU triggers the interrupt, and then pull the high level has passed 1us.  What do we do with this?  What is your suggestion? 

  • Hello  ,

    We are still looking at your query. Thank you for the patience.

    Warm regards,

  • Hi  

    You need to make sure then synch pulse occurs before the new MCLK cycle as indicates the timing diagram, if this is not the case, we cannot guarantee a proper synchronization.

     You will need to optimize the interruption routine to ensure the timing. You could also try to trigger the interrupt with the rising edge of DRL instead with the falling edge but make sure the SYNC goes high after the falling of DRL.