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AD7768: How can the input bandwidth of ADC is lesser than output data rate?

Category: Hardware
Product Number: AD7768


I am seeking clarification regarding the fundamental technical terms "input bandwidth," "input sampling rate," and "output data rate" as used in the datasheet for the AD7768 sigma-delta ADC.

Input Bandwidth: The datasheet specifies the input bandwidth of the AD7768 as 110 kHz. Could you please provide a detailed explanation of "input bandwidth" in the context of an ADC? How does the input bandwidth impact the ADC's ability to accurately convert a range of input signal frequencies?

Input Sampling Rate: What is the typical range of "input sampling rate" for a sigma-delta ADC like the AD7768? Is the input sampling rate equivalent to the oversampling rate? How does the input sampling rate influence the ADC's performance and its relationship with the input bandwidth?

Output Data Rate: The AD7768 datasheet specifies the output data rate as 250 kSPS. How does this output data rate relate to the input sampling rate and oversampling? Considering the ADC has an input sampling frequency of 110 kHz, how is it able to generate an output data rate of 250 kSPS?

I would greatly appreciate any technical insights or clarifications you can provide on these terms and how they specifically apply to the AD7768 ADC.



Added the product number to the subject field
[edited by: JEstayo at 4:33 AM (GMT -5) on 19 Feb 2024]

Top Replies

  • Hi  ,

    Please refer to below for the answers, but please note that this will be specific to the AD7768. If you have other questions, let me know.

    Input Bandwidth:
    This is the maximum input signal…