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ad4111

Category: Hardware
Product Number: AD4111

hello everyone, 
can anyone please help me getting started with ad4111 by giving a basic example to read 0 to 10v single-ended on every channel.

#adc#ad4111



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[edited by: mayur09 at 10:53 AM (GMT -5) on 16 Dec 2023]

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    •  Analog Employees 
    •  Super User 
    +1 verified

    Hi  ,

    In page 23 of the datasheet, you could see the suggested ADC configuration flow. In your setup, to be able to read single-ended on every channel, you could connect VINCOM to ground and sel…

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  • Hi  ,

    In page 23 of the datasheet, you could see the suggested ADC configuration flow. In your setup, to be able to read single-ended on every channel, you could connect VINCOM to ground and select the inputs in the CHANNEL REGISTER with (VINx, VINCOM).

    Then, you could configure the SETUP CONFIGURATION Register, Select filter and ODR. The input buffers must also be enabled when for VIN inputs for correct operation.

    One thing to note, when multiple channels are enabled, you must set the DATA_STAT bit to 1 in the INTERFACE MODE REGISTER. This bit will enable the 8 bits STATUS REGISTER to be appended to the DATA REGISTER. This will indicate which channel the data corresponds to. Furthermore, the ADC automatically sequences to all enabled channels from Channel 0 to Channel 15, if a channel is disabled, it is skipped by the sequencer. In any of the operating modes, continuous conversion mode, continuous read mode, and single conversion mode in the ADC MODE REGISTER, the user must poll or read the RDY bit in the STATUS REGISTER and wait for it to go LOW indicating that the data is ready and available to read.

    Hope this helps.

    Regards,

    JC

Reply
  • Hi  ,

    In page 23 of the datasheet, you could see the suggested ADC configuration flow. In your setup, to be able to read single-ended on every channel, you could connect VINCOM to ground and select the inputs in the CHANNEL REGISTER with (VINx, VINCOM).

    Then, you could configure the SETUP CONFIGURATION Register, Select filter and ODR. The input buffers must also be enabled when for VIN inputs for correct operation.

    One thing to note, when multiple channels are enabled, you must set the DATA_STAT bit to 1 in the INTERFACE MODE REGISTER. This bit will enable the 8 bits STATUS REGISTER to be appended to the DATA REGISTER. This will indicate which channel the data corresponds to. Furthermore, the ADC automatically sequences to all enabled channels from Channel 0 to Channel 15, if a channel is disabled, it is skipped by the sequencer. In any of the operating modes, continuous conversion mode, continuous read mode, and single conversion mode in the ADC MODE REGISTER, the user must poll or read the RDY bit in the STATUS REGISTER and wait for it to go LOW indicating that the data is ready and available to read.

    Hope this helps.

    Regards,

    JC

Children
  • Where can I find a full and workable sample codes for AD4111 for a ESP processor?

  • Hi  ,

    We have MBED sample codes readily available on our product page. The sample codes are compatible only with mbed based boards listed in Development boards | Mbed. Unfortunately, I do not see one that uses ESP processor so our available code cannot be used with it.

    Regards,

    JC

  • can you help me with this. I'm able to read adc address 0x30de using command 0x47 using spi from esp32 controller. but I don't know the exact setup commands sequence, setup configuration and clock setup to  read single ended channels. 

  • Hi  ,

    ADI North America will be on winter shutdown starting December 25, 2023; perhaps another community member can assist you until our return on January 8, 2024. We will get back to you soon. Sorry for the inconvenience.

    Regards,

    JC

  • Hi  ,

    Apologies for getting back just now. You may refer to the Suggested ADC Configuration Flow on how you could setup your ADC registers. Let us run through the configuration flow and give my suggestions to how you can read single ended channels. First of all, note that all access to the on-chip registers must start with a write to the communications register. This write determines which register is accessed next and whether that operation is a write or a read.

    To be able to read single-ended channels, connect the VINCOM pin to ground. You can access the Channel Registers in Address 0x10 to 0x1F. In the Channel register you can enable the specific channel by setting bit15 to 1, select the Setup you want to use, and which input pair is used for the channel. For single-ended channels, you may select input pairs with VINCOM pins as highlighted below.

    If an open wire detection is required, you may enable this feature by writing to the GPIO Configuration Register and set bit12 to 1.

    After setting up your Channel registers you can now configure the Setup Configuration Registers. In this register you can configure the reference selection, input buffers and output coding of the ADC. You can select for either unipolar or bipolar coding and select the reference whether you are using the external reference, internal 2.5V reference or used AVDD-AVSS as reference. One thing to note, the input buffers must be enabled when reading voltage inputs. The input buffers can be enabled by setting bit8 and bit9 to 1.

    For the Filter configuration, you can choose for either sinc3 and sinc5+sinc1 filters and select among the available output data rates. You can freely configure this to get the most optimum performance of your system.

    Using SETUPCON0 will also correspond to FILTCON0, OFFSET0 and GAIN0. Likewise, SETUPCON1 will correspond to FILTCON1, OFFSET1 and GAIN1 and so on.

    Next would be configuring the ADC Mode and Interface Mode. In the ADC Mode, it controls the operating mode of the ADC. The AD4111 has different available operating modes: Continuous Conversion Mode, Single Conversion Mode and Continuous Read Mode. I would recommend to just try first the default operating mode upon power up which is the Continuous conversion mode.

    In this mode the ADC is continuously converting and when RDY bit in the status register goes low, this will indicate that a conversion is completed. When multiple channels are enabled, the ADC automatically sequences through the enabled channels and converts once on each channel. When all enabled channels are completely converted, it starts again on the first enabled channel. To read a conversion, write to the communications register to indicate that the next operation is a read of the data register. When the data-word has been read from the data register, the DOUT/RDY pin goes high. The user can read this register additional times, if required. However, ensure that the data register is not being accessed at the completion of the next conversion. Otherwise, the new conversion word is lost. Enable the DATA_STAT bit in the interface mode to output the contents of the status register along with the conversion data. The four LSBs of the status register indicates which channel the conversion corresponds to.

    For the clock selection, you may select which ADC clock source you want to use. The ADC has an internal oscillator which you may use. If an external clock or external crystal is the source, there are factors needed to be considered. You may refer on the CLOCK SOURCE section on page 30 of datasheet.

    Regards,

    JC