AD4130-8 Duty Cycle Mode effect on ODR

Question

Hi,

I have been messing with the duty cycle mode on the AD4130-8 and it seems like a cool feature but I do not fully understand it.

My current setup is this: I have only 1 channel enabled, CHANNEL_0 with positive input select and negative input select at AIN0 and AIN1I respectively. FIFO is enabled in watermark mode, watermark interrupt enabled and watermark value is 0x80 (128 samples/trigger when half full).

I would assume then that if my ODR is currently at 2400 SPS (by setting the FS_n bits of Filter_n register to 0x01), then after enabling duty cycle mode in the default 1/4 duty cycle, then ODR (output data rate) would be about 2400/4 = 600SPS. But this is not the case and I see a much smaller ODR of around 200SPS and I don't quite understand why this is happening. I tested this by timing how long it takes to fill the FIFO for the interrupt to generate. So I want to ask, how does the duty cycle mode affect the ODR? Is there something else going on I'm not understanding?

Thank you for your help Rod :)

RAdante · Accepted Answer

Hi nealmcbealthenavyseal , 
 When the FIFO is enabled, the data ready signal becomes a FIFO ready signal that refers to the FIFO being ready to be read (low) or busy while being accessed by the device (high). 
 In your case, the ~200SPS you are seeing is also the data ready signal of the device. I have attached a figure using the ACE software with the configuration above, but I added another cycle so that we can observe the pluses of the RDY. It is being fired every 5.417ms corresponding to ~184SPS, which you are seeing. 
 The ~200SPS you are seeing is correct, it is the your standby time + active time as observed on the figure below. 
 The 600SPS effective ODR that you are expecting is just the active time, 1.667ms, corresponding to ~600SPS. It consists of the settling time + ideal conversion time (see formula below from the datasheet). 
 The actual output data rate at which the data is ready to be read is the ~200SPS, which is observed from the pulses of RDY. 
 
 Thanks and regards, 
 Rod)

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AD4130-8 Duty Cycle Mode effect on ODR