Post Go back to editing

AD4130-8 FIFO Data Threshold

Category: Software
Product Number: AD4130-8

Hi,

I am trying to understand how the setting of the FIFO data threshold works. The AD4130-8 datasheet says that the threshold values for the FIFO data threshold interrupt can be specified in the THRES_HIGH_VAL and THRES_LOW_VAL bitfields in the FIFO_THRESHOLD register. However each of the bitfields (THRES_HIGH_VAL and THRES_LOW_VAL) consists only of 12 bits while the ADC samples at 24 bits. So are the bits in this FIFO_THRESHOLD register only representative of the most significant 12 bits of the threshold value and the lower 12 bits are assumed to be all 1s? Or maybe I'm just misunderstanding something. Any help would be greatly appreciated.

Thank you in advance :)



Changed the product in the title from "AD-4130" to "AD4130"
[edited by: JEstayo at 2:11 AM (GMT -5) on 14 Dec 2023]

Top Replies

  • Hi  ,

    The bits[23:12] of the FIFO_THRESHOLD is the upper threshold value (you set) for FIFO data while the bits[11:0] is the lower threshold value. Whereas these are the values you set…

  • Hi  ,

    The bits[23:12] of the FIFO_THRESHOLD is the upper threshold value (you set) for FIFO data while the bits[11:0] is the lower threshold value. Whereas these are the values you set to monitor the conversion results stored in your FIFO. You may refer to the FIFO Threshold Values Register of the AD4130 datasheet below: 

    It is also noted that the threshold comparison has hysteresis of 1 LSB with respect to the threshold value you set.

    This means that when a conversion triggers THRES_HIGH_FLAG or THRES_LOW_FLAG to be set to 1, succeeding conversions must have DATA, Bits[23:12] at least 2 LSBs greater than the THRES_LOW_VAL bitfield, and 2 LSBs lower than THRES_HIGH_VAL bitfield for the THRES_LOW_FLAG and THRES_HIGH_FLAG bits to return to 0. The DATA, Bits[11:0] can be disregarded for threshold comparison.

    Thanks and regards,

    Rod