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MAX11043 Questions

Category: Hardware
Product Number: MAX11043

A few questions about the MAX11043:

  • Instead of using the external UP/DOWN or DACSTEP pins, I can simply write to the DAC registers over SPI and leave those pins unconnected. Correct?
  • The datasheet indicates there is a 12-bit DAC and two 8-bit DACs. I see the 12-bit DAC output pin, but how does one use the 8-bit DACs? Can all three DACs be used at the same time?
  • The datasheet recommends sending the same clock used for SPI to the external clock input for best performance. What happens if I use the internal osc instead, with the SPI clock being separate and presumably a different rate?


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[edited by: JCCillion at 9:39 AM (GMT -4) on 13 Jul 2023]
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  • MAX11043 Fine DAC can be controlled by SPI register write or by hardware UP/DONN pins. There are also two 8-bit coarse reference DACs (REFDACH and REFDACL) which together form the high and low limits of the 12-bt Fine DAC. These three DACs cannot be used independently; they are always used together: the 8-bit coarse REFDACH/REFDACL set the excursion limits for the fine 12-bit DAC.

    There's a subtle point about the internal clock vs the SPI clock. MAX11043 is a simultaneous-sampling sigma-delta ADC, so all of the acquisition and conversion timing is determined by the MAX11043 itself. There are internal data buffers to hold the conversion result, but it's critically important for the external microcontroller to respond to the EOC End Of Conversion interrupt rapidly enough to receive data before it is erased by the next sample. Because of this timing dependency, it's most efficient if the external microcontroller (which drives SPI clock) is operated synchronously with the MAX11043 (which determines EOC data available timing).

Reply
  • MAX11043 Fine DAC can be controlled by SPI register write or by hardware UP/DONN pins. There are also two 8-bit coarse reference DACs (REFDACH and REFDACL) which together form the high and low limits of the 12-bt Fine DAC. These three DACs cannot be used independently; they are always used together: the 8-bit coarse REFDACH/REFDACL set the excursion limits for the fine 12-bit DAC.

    There's a subtle point about the internal clock vs the SPI clock. MAX11043 is a simultaneous-sampling sigma-delta ADC, so all of the acquisition and conversion timing is determined by the MAX11043 itself. There are internal data buffers to hold the conversion result, but it's critically important for the external microcontroller to respond to the EOC End Of Conversion interrupt rapidly enough to receive data before it is erased by the next sample. Because of this timing dependency, it's most efficient if the external microcontroller (which drives SPI clock) is operated synchronously with the MAX11043 (which determines EOC data available timing).

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