AD4114 huge gain error when using Eval4114

Hi jansoe ,

Apologies for the late response. Please see key points for each item.

1. differential vin

- Can you share your setup or schematic using 8 potentiometers with a 1V supply voltage?

- Can you probe the actual input pins so we can ensure that the expected voltage is what the ADC is actually reading?

- Can you also try having an input of 0.1, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7, 0.8 V without using potentiometers?

2. Vref measurement

- What reference are you using? Assuming that you are measuring the internal reference by setting the INPUTx of the Channel Register to Reference, the measurement will be at full scale. The 0.1 factor is not considered since it is measured internally and will not be affected by the voltage divider circuit in the AFE.

3. temperature measurement:

- The conversion result is the voltage conversion.

4. AVDD

- Yes, it is better to restrict the voltages to +/-12V when AVDD = 3.3V.

- On page 16, there seems to be typographical error in the datasheet. Thank you for bringing this up to us. We will make sure that we include this in the next revision of the datasheet. The AD4114 can also operate in either 3.3V or 5V in single supply configuration.

Regards,

JC

你好，我现在也在使用AD4114这款ADC我现在对他使用系统校准模式的话，rdy信号没有正常变低，我读取的偏移寄存器值为初始值，对于增益寄存器我直接读不到他的值。您是如何使用这款ADC的校准模式以及如何验证的其有效分辨率的位数。

Hi beijingshi ,

You can post your inquiry in this community (+) EngineerZone. It would also be great if you could translate your inquiry to English language so we could better understand your question and provide support.

Regards,

JC

Hello, I am currently using the AD4114 ADC. When I try to use its system calibration mode, the RDY signal does not go low as expected. The value I read from the offset register is the initial value, and I cannot read the value from the gain register at all. How did you use the calibration mode of this ADC, and how did you verify its effective number of bits (ENOB)?

Hi beijingshi ,

You can treat the calibration mode just like another ADC conversion. The end of a calibration is determined when the RDY signal transitions low. Please note that if /CS is high, the DOUT/RDY pin is tristated, meaning it will not indicate the end of calibration or conversion. To observe the RDY pulse, ensure that /CS is low.

For system calibration, you must apply the system zero-scale and system full-scale voltages to the input pins before initiationg calibration. Additionally, the zero-scale calibration must be performed first, followed by the full-scale calibration.

beijingshi said:

The value I read from the offset register is the initial value, and I cannot read the value from the gain register at all. How did you use the calibration mode of this ADC, and how did you verify its effective number of bits (ENOB)?

Could you elaborate more on the issue you are encountering?

- Which calibration mode did you perform?

- When you say "I cannot read the value from the gain register at all," do you mean that the reigster returns zero, remains unchanged, or is inaccessible?

You can verifiy whether the calibration has completed successfully by:

- Checking if the offset and gain registers have updated values

- Alternatively, read the ADCMODE register. After calibration, the ADC goes into standby mode which is an indication that the calibration has finished.

Regards,

JC

Dear JCCillion

1. When I performed the system calibration mode, I only read the reset value for the offset register. However, when I tested the ADC conversion results with no input voltage, the results were not zero, and the values for all 16 channels were different.

2. For the gain register, when I select system gain calibration, its CS is 0 but its RDY signal remains permanently at 1 (monitored using Vivado's ILA). When I try to read the gain register, there is no return value. Furthermore, I don't quite understand the Vref reference voltage for its gain register calibration. My input maximum voltage is about 60V, which is divided down to 15V at the ADC input. What range of voltage should I input to the ADC during gain calibration?

Hi jansoe ,

beijingshi said:

1. When I performed the system calibration mode, I only read the reset value for the offset register. However, when I tested the ADC conversion results with no input voltage, the results were not zero, and the values for all 16 channels were different.

Did you apply your zero scale input before performing the system zero-scale calibration? One thing you could check is the reliability of the SPI communication. Could you try writing to any of the register and see if the changes are really updated?

You may also check on this FAQ - Digital Interface FAQ - Sigma Delta ADC - Q&A - Precision ADCs - EngineerZone.

beijingshi said:

2. For the gain register, when I select system gain calibration, its CS is 0 but its RDY signal remains permanently at 1 (monitored using Vivado's ILA). When I try to read the gain register, there is no return value. Furthermore, I don't quite understand the Vref reference voltage for its gain register calibration. My input maximum voltage is about 60V, which is divided down to 15V at the ADC input. What range of voltage should I input to the ADC during gain calibration?

The allowable voltage input range for a system full-scale calibration is 3.75*Vref to 10.5*Vref. Applying a voltage beyond the range will saturate the ADC. 

Also note that the ADC is only capable of differential input voltage of +/- Vref*10.

If you want to learn more about calibration you may use this Application Note as a reference - AN-1464: AD7172-2, AD7172-4, AD7173-8, AD7175-2, AD7175-8, AD7176-2, AD7177-2, AD7124-4, and AD7124-8 Calibration | Analog Devices.

Regards,
JC

Hi jansoe ,

beijingshi said:

1. When I performed the system calibration mode, I only read the reset value for the offset register. However, when I tested the ADC conversion results with no input voltage, the results were not zero, and the values for all 16 channels were different.

Did you apply your zero scale input before performing the system zero-scale calibration? One thing you could check is the reliability of the SPI communication. Could you try writing to any of the register and see if the changes are really updated?

You may also check on this FAQ - Digital Interface FAQ - Sigma Delta ADC - Q&A - Precision ADCs - EngineerZone.

beijingshi said:

2. For the gain register, when I select system gain calibration, its CS is 0 but its RDY signal remains permanently at 1 (monitored using Vivado's ILA). When I try to read the gain register, there is no return value. Furthermore, I don't quite understand the Vref reference voltage for its gain register calibration. My input maximum voltage is about 60V, which is divided down to 15V at the ADC input. What range of voltage should I input to the ADC during gain calibration?

The allowable voltage input range for a system full-scale calibration is 3.75*Vref to 10.5*Vref. Applying a voltage beyond the range will saturate the ADC. 

Also note that the ADC is only capable of differential input voltage of +/- Vref*10.

If you want to learn more about calibration you may use this Application Note as a reference - AN-1464: AD7172-2, AD7172-4, AD7173-8, AD7175-2, AD7175-8, AD7176-2, AD7177-2, AD7124-4, and AD7124-8 Calibration | Analog Devices.

Regards,
JC

I am using the AD4114 chip for single-channel conversion and am currently unsure about the appropriate method to verify its effective resolution. I hope to receive your assistance. Thank you.

Hi jansoe ,

For your future queries, I would recommend you post a new thread so that we could address each issues/concern separately.

To calculate the ADC resolution, you can use the following equation.

The noise performance in the datasheet is based on 1000 samples. You can apply the same approach: collect 1000 samples, calculate the RMS noise, and use that value to determine the effective resolution.

I hope this clarifies your question.

Regards,
JC

I am using the method described in the document above to measure the effective resolution. Currently, on my circuit board, I short the input terminal, then read the code value from a specific ADC channel, convert it to voltage, and perform Gaussian distribution analysis. I then use the resulting standard deviation as the RMS noise to calculate the corresponding resolution.Is my calculation method correct?PDF