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AD4114 huge gain error when using Eval4114

Category: Hardware
Product Number: AD4114

Hi,

I'm using the Eval 4114 board with a STM32 nucleo64. So far I configured 8 differential channels for Vin plus the VRef and the temperature.

I use the 16bit rounding mode with the status byte following. On all of them I don't receive the expected result:

1. differential vin

On the analog inputs I've connected 8 potentiometers (10k) with with the voltage 0.1, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7, 0.8 V with a supply voltage of 1V.

When I read these differential channels (unipolar) I get a result that is too small, about 59% of what is expected. All channels behave the same. If I use a supply voltage on the voltage dividers of 2V then all values are the double.

in principal the adc seems to work, but for some reason there is a hugh gain error. The internal offset/gain calibration does not change this. If I use an additional gain in my SW of 1.68, then all values are within 3mV to the external voltages.

What could cause these identical gain errors?

2. Vref measurement

reading the Vref results in a code of 65535d in 16bit mode, that's what I would expect (full scale). Is this the correct behaviour?

here I don't use the correction factor and get 25V when using the formula of the data sheet. From this I would learn that the formula is correct and internal measurements are correct. This would imply that the gain errors are caused externally on the demo board.

3. temperature measurement:

Temperature = (Conversion Result/477 μV) − 273.15

what is the convertion result? is it in volts using the voltage conversion formula first or directly the data bits?

Either way, the result is completely wrong. There is no further explanation in the data sheet....

4. AVDD

this is extremely confusing. It is stated on page 5:

SPECIFICATIONS
AVDD = 3.0 V to 5.5 V, IOVDD = 2 V to 5.5 V, REF− = AVSS = 0 V, DGND = 0 V, VBIAS− = 0 V, REF+ = 2.5 V    -> this must be the single supply operation as AVss = 0V , so AVDD is allowed to be 3.3V

in the table below on page 5 is stated:

Absolute Input Pin Voltage       AVDD ≥ 4.75 V       −20   +20V
                                                      AVDD = 3.0 V         −12   +12V

I would interpret this as it is allowed and possible to use AVDD = 3.3V in single supply mode but the voltages will be restricted to +-12V.

Why then there is a paragraph on page 16 stating:

Single-Supply Operation (AVSS = DGND)
When the AD4114 is powered from a single supply connected to AVDD, the supply must be 5 V. In this configuration, AVSS and DGND can be shorted together on a single ground plane.
IOVDD can range from 2 V to 5.5 V in this unipolar input configuration.

I tried both, no difference. But the point is that 5V/3V = 1.66, which is my gain error factor as explained above.  Is this just coincidence? I hoped changing to AVDD = 5V instead of 3V3 would solve the gain problem, but it doesn't.

Has anyone experienced similar problems ?

Thanks for your help.

Jan

Parents
  • Hi  ,

    Apologies for the late response. Please see key points for each item.

    1. differential vin

    - Can you share your setup or schematic using 8 potentiometers with a 1V supply voltage?

    - Can you probe the actual input pins so we can ensure that the expected voltage is what the ADC is actually reading?

    - Can you also try having an input of 0.1, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7, 0.8 V without using potentiometers?

    2. Vref measurement

    - What reference are you using? Assuming that you are measuring the internal reference by setting the INPUTx of the Channel Register to Reference, the measurement will be at full scale. The 0.1 factor is not considered since it is measured internally and will not be affected by the voltage divider circuit in the AFE.

    3. temperature measurement:

    - The conversion result is the voltage conversion.

    4. AVDD

    - Yes, it is better to restrict the voltages to +/-12V when AVDD = 3.3V.

    - On page 16, there seems to be typographical error in the datasheet. Thank you for bringing this up to us. We will make sure that we include this in the next revision of the datasheet. The AD4114 can also operate in either 3.3V or 5V in single supply configuration.

    Regards,

    JC

  • Hi JC,

    thanks for your additional information. in the meantime I've got some answers to your questions:

    1. differential vin:

    I attached a simple schematic of the potentiometer circuit. The question here is what to do with the connections GND and COM. I connected them to the external gnd of the power supply.

    I also disconnected all channels except the pair 5/4 which refers to my Ch2 of the print screen. This channel was driven directly by a power supply with 1V. Pin5 +1V, Pin4 gnd and connected to GND and COM. There is no difference, the original reading is 0x617 or 1559d and using the formula of the data sheet i get 0.5947V.

    I also measured across C28 which should correspond to the pin voltages of the ad4114, the difference is 1V.

    2. Vref:

    I am using the internal reference. I get xFFFF and without the factor of 10 it gets 2.5V, I guess that is the expected result as you already stated.

    3. temp:

    when skipping the factor 10 then I get a reasonable value of about 20deg on my desk.

    4. AVDD:

    I am glad to hear this although I placed a second LDO to generate 4.85V if needed.

    So I guess topic 2,3,4 are ok.

    I was worried that the gain error would depend on the external filters. But since the voltage over C28 is 1V and this is the chip input I have no clue what could cause this gain error except that the formula or the configuration is wrong.

    I also attached a print screen. Here you can see the configuration values and then the readings without synchronization. as I stated before I am using the 16bit mode together with the channel number following the data. so I read the middle 2 bytes of the 4 bytes, that value is Vin. It would be interesting to know the input value when you do the same test with the eval board.

    as you can see, sometimes the RDY is 0, sometimes 1, but the values are the same and the ERR bit is low.

    What bothers me is that the Vref (Ch8) always shows the error bit set. What could cause this behaviour?

    Please have a look at the configuration values, maybe you see some mistake.

    What should be done with COM in differential mode? Why is it connected to a jumper?

    kind regards,

    Jan

     PDF

  • Hi  ,

    I also have tested this on my end. I tried having an input of 1V and got an output closer to 1V as shown below. The inaccuracy is may be caused by my supplied input.

     

    Here are my register settings:

    0x1 - A000
    0x2 - 0041
    0x4 - 0A24
    0x12 - 8085
    0x20 - 0320
    0x28 - 0505

    I am curious about the 4 bytes that you are reading. Setting the ADC to 16bit mode will have an output of 16bits or 2 bytes. I am assuming that you have also set the "Data + Status Output" bit and appended the status at the end of the output data bits. This will result to 3bytes or 16bits output data + 8bits status. What is the first byte that you are reading? Reading the wrong byte may have resulted in an MSB error.

    Ensure that the DOUT/RDY pin has returned to low before reading the data. This will determine that the ADC conversion is completed and the data is valid.

    For the CH8, since you are reading the internal reference, this will result in full scale and flag an overrange. That is why the ADC error bit is 1.

    The COM pin is used for single-ended inputs. The jumper is used for shorting the COM pin to Ground. It is okay leaving the COM pin shorted to ground or removing the jumper. Having the COM pin shorted to ground will remove any errors that may be caused by a floating pin.

    Regards,

    JC

  • Hi JC,

    thanks for your comments and questions.

    In ther register configuration I found 2 important differences:

    0x1 - A000 - single cycle, no delay      i used 8700: NO Single cycle, delay: 8ms
    0x2 - 0041 - same
    0x4 - 0A24 - this is x1.66 bigger than my result
    0x12 - 8085 - you use Vin4, Vin5   but I use Vin5, Vin4   -> this should give a negative result in one case.
    0x20 - 0320 - you use INBUF = 3 , I used INBUF= 1 which is a reserved value
    0x28 - 0505 - you use 31.25 sps, i use 1.25sps

    I guess either single cycle or continuous should give the same results. adding more delay should improve. But how much delay is necessary? If several channels are to be measured then there will be a settling time after switching the channel. There are 8 possible delay values, how to chose the right one for a given setup?

    the channel selection worries me. The data sheet does not explain what the channel selection actually means. What means Vin4,Vin5 or Vin5,Vin4? What is the positive resp the neg input ? For a differential input I would expect to be declared as U1 - U2, or in these case Vin4 - Vin5 esp. Vin5 - Vin4.

    Since I connected 1V to Vin5 and gnd to Vin4 I set the selection to Vin5,Vin4 -> A4

    The fact that you chose vin4,Vin5 -> 85 shows that my guessing is probably wrong. But what then means the result? According to the data sheet I have to use the formula and get a positive voltage, just much too small. is it in fact a negative value? The data sheet should explain what these selections mean. Maybe in your GUI this is done much better but I can't use that SW because it does not work without a board connected. But why? It would help so much just to configure and then be able to see the config value and copy it to the code... so which selection is correct?

    But there is also a second problem, I chose INBUF = 1 instead of 3. The function means 'reserved' and it might also cuase this gain error.

    regarding the SPI data bytes, while sending the CMD byte the SPI RX is clocking in 8 bits which are dummy. Afterwards the AD4114 sends 2 bytes of data followed by 1 byte of status. In total 4bytes in the SPI RX register.

    Kind regards,

    Jan

  • Hi  ,

    The delay will depend on the external circuit that needs some time to settle such as external amplifier, multiplexer or RC filter.

    Apologies for the confusion in the channel inputs. What I used in my setup is (Vin4, Vin5). Vin4 is connected to 1V while Vin5 is connected to ground. In a given differential pair, in example (Vin4, Vin5) the positive input is Vin4 while the negative input is Vin5. Looking at the datasheet, each differential pairs are always (Vin+,Vin-). 

    Since you connected 1V to Vin5 and gnd to Vin4, and your setup is (Vin5,Vin4), the equation would be Vin5 - Vin4. I hope this has given you clarity.

    The input buffer must be enabled to operate correctly for a Vinx input. This is also mentioned in the datasheet on page 17, Configuration Overview section. See image below. 

    The Analog input buffers should be enabled for voltage Analog inputs as these provide a low source impedance to the sampling ADC. If these buffers were disabled, then a large resistance would exist. This combined with any parasitic capacitance from the resistive front end driving the ADC input will result in a very large gain error. Also, note that you should always consider the effect of a resistor connected in series with the internal input resistance. This will affect the divider ratio resulting also in a gain error but can be removed by a system calibration or by adjusting the gain register appropriately.

    Lastly, using a lower ODR will give a better noise performance.

    Regards,

    JC

  • Hi JC,

    thanks a lot for your comments. Now it seems that the channel selection is correct and with the input buffer enabled properly the data reading of all channels are correct, even with the 10k potentiometers (1-3mV errors). I still have to play with the ODR and settling time to get the optimum for my application.

    Since I've got two ADC on my pcb I would like to synchronize them but they run individually on their internal clocks as they don't have to be clock synchronous. I just would like to pack the results of both sequences in the same data packet.

    As I have 9 channels enabled per ADC I would like to synchronize the start of the reading sequence. My idea is to start the sequence of reading 9 channels (ch0 to 8), then stop and wait until next start command. From reading the section in the data sheet it seems that it could be done with the ALTERNATE sync mode but it is written that the next channel is selected and not that the sequence counter is reset when SYNC = low. How then do I know which channel is the first to be read? On the other hand the NORMAL sync mode seems to reset the sequence counter but it speaks only of single channel operation.

    How can I achieve a simple synchronization of seuqences of the 2 devices?

    Kind regards,

    jan

  • Hi  ,

    Glad to hear that it is finally working.

    The AD4114 does not have the capability to output the data of the 2 ADCs in the same data packet. You may want to consider an ADC that has a daisy-chain capability such as the AD7768. You will need two DOUT lines if you want to read the data of the 2 ADCs.

    To simplify the interface when using multiple ADCs, the sync pin can be used to synchronize the devices. When using the ALT_SYNC, you may be able to control the instant at which the conversion begins on the next channel. The devices must be sharing the same CLKIO or the clock from a main ADC can also be used as input to the other subordiante ADCS. You will then need to monitor only the DRDY signal of the main device. Then the DRDY goes low, read its conversion. At this point the other ADCS have already completed converting. Since they are in sync, it is not necessary to monitor the DRDY signals of the other ADCs. With this architecture, it is important that all conversions from the ADCs are read back before the next conversion from the main ADC is ready. This ensures that all conversions from ADCs are read (ensures no conversions are missed).

    Regards,

    JC

Reply
  • Hi  ,

    Glad to hear that it is finally working.

    The AD4114 does not have the capability to output the data of the 2 ADCs in the same data packet. You may want to consider an ADC that has a daisy-chain capability such as the AD7768. You will need two DOUT lines if you want to read the data of the 2 ADCs.

    To simplify the interface when using multiple ADCs, the sync pin can be used to synchronize the devices. When using the ALT_SYNC, you may be able to control the instant at which the conversion begins on the next channel. The devices must be sharing the same CLKIO or the clock from a main ADC can also be used as input to the other subordiante ADCS. You will then need to monitor only the DRDY signal of the main device. Then the DRDY goes low, read its conversion. At this point the other ADCS have already completed converting. Since they are in sync, it is not necessary to monitor the DRDY signals of the other ADCs. With this architecture, it is important that all conversions from the ADCs are read back before the next conversion from the main ADC is ready. This ensures that all conversions from ADCs are read (ensures no conversions are missed).

    Regards,

    JC

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