in the past we had done some experimentation with your ADAQ23875 eval board, all working fine.
We now have implemented our own design, connecting several ADAQ23875 to a Xilinx Kintex-7 FPGA, our own VHDL code.
We believe to have hooked up the ADAQ23875 exactly as outlined in the datasheet, employing single-lane mode.
What we observe, for all ADAQ23875 devices connected:
- on DCO we receive back the echo clock correctly
- on DA we have a constant 0, irrespective of engaging TESTMODE or supplying analog input.
We verified compliance to your datasheet thoroughly.
We inspected the eval board documentation and found one difference to the datasheet:
- eval board: pin K4 is open, NC
- datasheet: pin K4 is GROUND.
We appreciate any comments.
Thanks and best regards