Product Number: AD5941
Software Version: master
In the Impedance example whenever a DC voltage is applied, the VZero is also set to half of it's maximum range. I can see this been done
line 260 of impedance.c is
lpdac_cfg.DacData6Bit = 0x40>>1; /* Set Vzero to middle scale. */
but why is it set to the middle of the scale? Does that not just lower the maximum possible bias applied since the bias is the difference between Vzero and VBias?