AD4134 DIG_FILTER_OFUF overflow

Hi 86yjx ,

Do you encounter the channel overflow upon power up before applying analog inputs? Do you encounter this also when setting the filter to wideband or sinc6 filter?

Are the values in registers 40, 41, 41 changing to random values?

Thanks,

Janine

Yes，registers 41/42 random values I fix it ,you must set High Performance Mode,  But  the channel overflow upon power up still exist，the registers 40 will change ，but I test the analog input voltage is in normal range，and another error the DCLK error, 

ODR=750kHz,DCLK=48MHz，I use Gated DCLK，please help me how to fix it ?

Hi 86yjx ,

Apologies for getting back to you just now.

What is the analog input value and is the digital output correct for your input? Also, what is the reference voltage you are using?

Thanks,

Janine

Hi 86yjx ,

Apologies for getting back to you just now.

What is the analog input value and is the digital output correct for your input? Also, what is the reference voltage you are using?

Thanks,

Janine

Thanks，I test analog input (0.002V),and the reference voltage is 4.096V.

Hi 86yjx ,

Is the digital output correct for your input?

Thanks,

Janine

Yes，about right.

Hi 86yjx ,

Please see comments below. Thank you.

• Digital filter overflow
  • Can you try to read back the registers upon power up before applying input?
• Filter not settled
  • What channels are you using? What values are you reading from the register 0x41? From the previous data, digital filter for Channels 0 and 1 are settled.
• DCLK ERROR
  • You have mentioned you are using DCLK 48MHz but register 0x11 is set to 0x20 where the DCLK is 12MHz. This may be the reason for the DCLK error.
• Kindly provide the schematic and register values upon power up.
• Are you providing correct input to AVDD1V8, DVDD1V8, and CLKVDD?

Thanks,

Janine

Only one question remains, register 0x11 set to 0x20 means Bits：0010-0000, ,I got it from datasheet 24-bit ADC data only and DCLK=48MHz， I don't understand why the DCLK is 12MHz?     0010 is Bits-7:4 0000 is Bits 3:0 ? How can I set the DCLK 48MHz by register 0x11? 

Hi 86yjx ,

You are correct. The DCLK is set to 48MHz. I apologize for the confusion. Are you still encountering the DCLK error?