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AD7771 and DOUTx interface

Category: Software
Product Number: AD7771


I want to read ADC data from AD7771 via DOUT0 line - all 8 channels in 1 line.

What I did:

I am in SPI control mode:

- Set PowerMode to LP

- Set decimation rate (I want ODR = 1 kHz) => 1024/1 = 1024 = 0x400 - to the rigister  SRC_N_MSB I wrote 0x04 and to SRC_N_LSB I wrote 0, then I update it via register 0x64 (SRC_UPDATE)

- Set Output format and DCLK via reg. 0x14 (DOUT_FORMAT) => DOUT_FORMAT = 0b11100100 (1 DOUTx line,CRC header,reserved,MCLK/4,Reserved).

- Set reference to internal via reg. 0x15 (ADC_MUX_CONFIG) => ADC_MUX_CONFIG = 0b01000000

After that I can see:

- DRDY pin has period of 1 khz - perfect!

- On the scope I can see 8x32 bits packets - looks OK to me.


- Is OK when after all 8x32 bits packet the CLK still generates cloks even if the data are already sent?

image here:

- Where does the data start (CRC header for channel 0)?:

Finally I tried to read this data by STM32 via SAI interface, but I am not succesful. The discussion is here without answer:  RE: Any advice on reading the AD7779 DOUT0 using an STM32 SAI input? 

Thank you for any advice.


Top Replies

  • Hi   ,

    Regarding the data read using SAI- Attached below are the settings with which I was able to get the data read successfully


    Details:{AudioMode = 3, Synchro = 0, SynchroExt = 0, MckOutput…

  • Hi  ,

    We will look into this. I will contact the product owner and get back to you. 



  • Hi  ,

    The CLK is free running so there will be extra clocks if Output data rate is low. You can ignore the clocks after 8x32 bits till there is another DRDY signal.

    The data start is on the first clock…