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This bit controls the operation of the input buffer on the AINCOM input when a channel is configured for pseudo-differential mode of operation. If cleared [default behaviour], the analog negative input (AINCOM) is unbuffered allowing it to be tied to AGND in single-ended input configuration. If this bit is set the analog negative input (AINCOM) is buffered, placing a restriction on its common-mode input range
page: 37
Single-Ended Operation
The NEGBUF bit in the mode register is used to control the operation of the input buffer on the AINCOM pin when configured for pseudo-differential mode of operation. If cleared, the analog negative input (AINCOM) is unbuffered. It should be noted that the unbuffered input path on the AINCOM provides a dynamic load to the driving source. Therefore, resistor/capacitor combinations on this input pin can cause dc gain errors depending on the output impedance of the source that is driving the AINCOM input. AINCOM is tied to AGND for single-ended operation. This enables all pseudo-differential inputs to act as single-ended analog inputs.
