HI
I use AD7656BSTZ-1 in my new design, I noticed that this chip uses multiple power supplies, AVCC, DVCC, VDRIVE, VDD, and VSS.
while power on, is there some requirements for their power-on sequences?
Regards
HI
I use AD7656BSTZ-1 in my new design, I noticed that this chip uses multiple power supplies, AVCC, DVCC, VDRIVE, VDD, and VSS.
while power on, is there some requirements for their power-on sequences?
Regards
Hi,
The power sequence should be VDD-VSS-AVCC-DVCC and lastly the VDRIVE. The VDRIVE should be last to be supplied because based on the absolute maximum ratings, it requires the DVcc first to determine the limits of the VDRIVE. Same with the DVcc, first it requires AVcc to determine the limits of the DVcc.
Regards,
Andrei
Can vdd-vss-avcc-dvcc be powered on synchronously with using the same enable signal? then power on the VDRIVE?
VDD (+12)and VSS(-12) are powered from a same POL module with single enable pin, I can't control VDD to be powered on before VSS.
Thanks.
VDD and VSS can be powered on using the same enable signal. either of the two supplies, whichever will be powered on first would be fine.
Thanks,
Andrei
Finally, I want to know whether avcc-dvcc can be powered on at the same time after VDD/VSS and before VDRIVE?
Thanks
Yes it can be powered on the same time