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Regarding AD2S1210 datasheet

Respected Sir.
PFA datasheet of resolver ic "AD2S1210(">www.analog.com/.../AD2S1210.pdf)" , we have encountered few technical issues with the datasheet.
  1. According to the CONTROL REGISTER Table 21. 8-Bit Register. The Read/Write address bit is 0x92 D7 to D0 Read/write and the control register is an 8-bit register that sets the AD2S1210 control modes.
The default value of the control register for the power-up is "0x7E".
while reading control register, data at SDO pin should be "0x7E" but instead of that it gives 0x3F,
Then, we shifted 1 bit left side and we are getting data correctly as "0x7E" with the following code
/* read value from one of the registers */
unsigned int readRegister_config(byte thisRegister, int bytesToRead) {
  byte inByte = 0;           // incoming byte from the SPI
  unsigned int result = 0;
  int addr = 0xff;
  mode(3);// result to return
  spi_tx(thisRegister);
  result = spi_tx(0xFF);
  bytesToRead--;
  if (bytesToRead > 0) {
    result = result << 8;
    inByte = spi_tx(thisRegister + 1);
    result = result | inByte;
    bytesToRead--;
  }
  mode(mode_def);
  result = result << 1;
  return (result);
}
Please confirm it.
       2.According to Table 2. Timing Specification, the operating clock period is 98ns to 163ns, then how it could identify the period less than 98ns?
e.g t1(2ns),t3(3ns),t4(3ns).
Please verify that the given timing for the t1,t3,t4,t13,t14a and whichever is less than 98ns is correct.
If I am getting something wrong then please correct me.
Looking forward to hearing from you.
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Thanks & Regards
Divyesh Patel