I am trying to use AD4696 but, ı could not access register 0x003.As you can you see scope picture MISO pin always is LOW.
Also you can see my schematic block design.
Thanks for your query.
Can you confirm how you are supplying the VDD voltage? Are you using the Internal LDO? If so, is there a decoupling capacitor on VDD? If not, the LDO may be unstable and not supplying VDD properly, causing the register memory on the device to not be powered.
In general I do recommend a pull-up on SDO, but the root of the issue is almost definitely the lack of decoupling capacitor on VDD.
VDD is connected to the output of the Internal LDO, and the Internal LDO needs a capacitor on its output to remain stable. If that isn't there, then device will exhibit the behavior you are seeing.
I recommend a 0.1uF decoupling cap be added to VDD. If that's not possible on your board, another option would be to jumper the 1.8V being supplied to VIO over to the VDD pin, and disable the internal LDO by writing the LDO_EN bit in the SETUP register to 1'b0. This would work at least for debug/prototyping purposes.
In fairness the current revision of the data sheet online (Rev 0) could do a better job of communicating the need for VDD decoupling capacitor for Internal LDO functionality. We are currently processing a revision to the data sheet to make this more clear. For now, please refer to this statement which will be in the next revision of the data sheet: