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AD7124-4 Internal Calibration function error

Hi everyone,

Currently I'm developing a measurement system with the AD7124-4. My proble is that  I'm not able to realize the internal calibration process. I'm using the drivers provide in the product webpage, but when I try to do a calibration it fails. I'm executing the following after a reset, power on and configuring the ADC with only one channel enabled and in Standby mode with low power.

It doesn't give me any error, it's not updating the offset and gain register.

I have attached the function I'm developing to do the calibration and the register configured after doing the reset.

int32_t ad7124_system_calib (struct ad7124_dev * dev, struct ad7124_init_param init_param)
{
	int32_t ret;
	uint32_t value;
	struct ad7124_st_reg test;
	if (chip_select == 0)
	{
		prueba.addr = 0x29; // ADC1 selection offset
	}
	else
	{
		prueba.addr = 0x2A; // ADC2 Selection offset
	}
	prueba.size = 3;
	prueba.rw = 1;
	prueba.value = 0;
	
	ret = ad7124_read_register(dev,&prueba); // check offset register
	if (ret < 0)
		return ret;
	value = prueba.value;

	if (chip_select == 0)
	{
		prueba.addr = 0x31;  // check gain register ADC1 Address
	}
	else
	{
		prueba.addr = 0x32; // check gain register ADC2 Address
	}
	prueba.size = 3;
	prueba.rw = 1;
	prueba.value = 0;
	ret = ad7124_read_register(dev,&prueba);  // check gain register
	if (ret < 0)
		return ret;

	//system full

	prueba.addr = 0x1;
	prueba.size = 3;
	prueba.rw = 1;
	prueba.value = 0;
	ret = ad7124_read_register(dev,&prueba); // Check ADC_Control Register Value
    if (ret < 0)
		return ret;
	prueba.addr = AD7124_ADC_Control;  
	prueba.value = 0x0018;   // full scale internal
	prueba.rw = 1;
	prueba.size = 3;
	calib = 1;

	ret = ad7124_write_register(dev,prueba); // write AD7124 ADC control register 
	if (ret < 0)
		return ret;
	
	calib = 0;
	Delay(1000);
	if (ret < 0)
		return ret;

	//system Zero
	prueba.addr = AD7124_ADC_Control;
	prueba.value = 0x014;
	prueba.rw = 1;
	prueba.size = 3;
	ret = ad7124_write_register(dev, prueba); // write AD7124 Control register
	Delay(1000);
	if (ret < 0)
		return ret;
	
	// check offset and gain values
	if (chip_select == 0)
	{
		prueba.addr = 0x29; // offset setup 0
	}
	else
	{
		prueba.addr = 0x2A; // offset setup 1
	}
	prueba.size = 3;
	prueba.rw = 1;
	prueba.value = 0;
	ret = ad7124_read_register(dev,&prueba);
	if (ret < 0)
		return ret;
	if (chip_select == 0)
	{
		prueba.addr = 0x31; // gain setup 0
	}
	else
	{
		prueba.addr = 0x32; // gain setup 1
	}
	prueba.size = 3;
	prueba.rw = 1;
	prueba.value = 0;
	ret = ad7124_read_register(dev,&prueba);
	if (ret < 0)
		return ret;
	prueba.addr = 0x1;
	prueba.size = 3;
	prueba.rw = 1;
	prueba.value = 0;
	ret = ad7124_read_register(dev,&prueba); // check control register
	if (ret < 0)
		return ret;
	return ret;
}

struct ad7124_st_reg ad7124_regs_calib[AD7124_REG_NO] = {
            {0x00, 0x00,   1, 2}, /* AD7124_Status */
			{0x01, 0x0008, 2, 1}, /* AD7124_ADC_Control */
			{0x02, 0x0000, 3, 2}, /* AD7124_Data */
			{0x03, 0x0000, 3, 1}, /* AD7124_IOCon1 */
			{0x04, 0x0000, 2, 1}, /* AD7124_IOCon2 */
			{0x05, 0x02,   1, 2}, /* AD7124_ID */
			{0x06, 0x0000, 3, 2}, /* AD7124_Error */
			{0x07, 0x0044, 3, 1}, /* AD7124_Error_En */
			{0x08, 0x00,   1, 2}, /* AD7124_Mclk_Count */
			{0x09, 0x8022, 2, 1}, /* AD7124_Channel_0 */
			{0x0A, 0x0001, 2, 1}, /* AD7124_Channel_1 */
			{0x0B, 0x0022, 2, 1}, /* AD7124_Channel_2 */
			{0x0C, 0x0064, 2, 1}, /* AD7124_Channel_3 */
			{0x0D, 0x00B1, 2, 1}, /* AD7124_Channel_4 */
			{0x0E, 0x00D1, 2, 1}, /* AD7124_Channel_5 */
			{0x0F, 0x00F1, 2, 1}, /* AD7124_Channel_6 */
			{0x10, 0x0001, 2, 1}, /* AD7124_Channel_7 */
			{0x11, 0x0001, 2, 1}, /* AD7124_Channel_8 */
			{0x12, 0x0001, 2, 1}, /* AD7124_Channel_9 */
			{0x13, 0x0001, 2, 1}, /* AD7124_Channel_10 */
			{0x14, 0x0001, 2, 1}, /* AD7124_Channel_11 */
			{0x15, 0x0001, 2, 1}, /* AD7124_Channel_12 */
			{0x16, 0x0001, 2, 1}, /* AD7124_Channel_13 */
			{0x17, 0x0001, 2, 1}, /* AD7124_Channel_14 */
			{0x18, 0x0001, 2, 1}, /* AD7124_Channel_15 */
			{0x19, 0x0861, 2, 1}, /* AD7124_Config_0 */
			{0x1A, 0x0879, 2, 1}, /* AD7124_Config_1 */
			{0x1B, 0x0860, 2, 1}, /* AD7124_Config_2 */
			{0x1C, 0x0860, 2, 1}, /* AD7124_Config_3 */
			{0x1D, 0x0860, 2, 1}, /* AD7124_Config_4 */
			{0x1E, 0x0860, 2, 1}, /* AD7124_Config_5 */
			{0x1F, 0x0860, 2, 1}, /* AD7124_Config_6 */
			{0x20, 0x0860, 2, 1}, /* AD7124_Config_7 */
			{0x21, 0x06003C, 3, 1}, /* AD7124_Filter_0 */
			{0x22, 0x06003C, 3, 1}, /* AD7124_Filter_1 */
			{0x23, 0x060180, 3, 1}, /* AD7124_Filter_2 */
			{0x24, 0x060180, 3, 1}, /* AD7124_Filter_3 */
			{0x25, 0x060180, 3, 1}, /* AD7124_Filter_4 */
			{0x26, 0x060180, 3, 1}, /* AD7124_Filter_5 */
			{0x27, 0x060180, 3, 1}, /* AD7124_Filter_6 */
			{0x28, 0x060180, 3, 1}, /* AD7124_Filter_7 */
			{0x29, 0x800000, 3, 1}, /* AD7124_Offset_0 */
			{0x2A, 0x800000, 3, 1}, /* AD7124_Offset_1 */
			{0x2B, 0x800000, 3, 1}, /* AD7124_Offset_2 */
			{0x2C, 0x800000, 3, 1}, /* AD7124_Offset_3 */
			{0x2D, 0x800000, 3, 1}, /* AD7124_Offset_4 */
			{0x2E, 0x800000, 3, 1}, /* AD7124_Offset_5 */
			{0x2F, 0x800000, 3, 1}, /* AD7124_Offset_6 */
			{0x30, 0x800000, 3, 1}, /* AD7124_Offset_7 */
			{0x31, 0x500000, 3, 1}, /* AD7124_Gain_0 */
			{0x32, 0x500000, 3, 1}, /* AD7124_Gain_1 */
			{0x33, 0x500000, 3, 1}, /* AD7124_Gain_2 */
			{0x34, 0x500000, 3, 1}, /* AD7124_Gain_3 */
			{0x35, 0x500000, 3, 1}, /* AD7124_Gain_4 */
			{0x36, 0x500000, 3, 1}, /* AD7124_Gain_5 */
			{0x37, 0x500000, 3, 1}, /* AD7124_Gain_6 */
			{0x38, 0x500000, 3, 1}, /* AD7124_Gain_7 */
		};