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Missing RDY signal in AD7175-2 in Single Conversion Mode

I have an AD7175-2 24-bit ADC. It is fully initialized and set to Single Conversion mode. I start the single conversion with 0x01 0x8010 command (REF = ON, Single Conversion Mode) the I wait for the DOUT\RDY signal to be low and indicate the end of the conversion. But it never happens. If I switch to Continuous mode the DRY pulsing with 15 625Hz set in the clock register. The DOUT/DRY output is right but in Single Conversion Mode the DOUT/RDY never goes low to signal the end of the conversion.

The upper picture is from the AD7175-2 data sheet, the lower one is a screenshot of my scope. The colors: Yellow = CS, Green = DIN, Blue = DOUT/RDY, Pink = SCLK. The traces are in the same order as in the data sheet figure 72.

It is obvious that the blue trace never goes low after the conversion is complete. Why?

Note: It works without waiting for the RDY signal falling edge. The program temporarily waits a bit longer than the conversion time and send 0x44 command and receives the 3-byte conversion result.

I need a good explanation why the RDY signal is not shown on the screenshot of my scope?

Many thanks for your help. Best regards,

Louis

  • Hi Louis, 

    Are you timing out the conversion? On the above scope shot it seems that you are writing the command to read regardless whether the DRDY is high or low. I would suggest to poll the RDY bit in the status register or the DRDY pin and when it goes low that is the time you need to write a read command. 

    Since in single conversion mode, the part is placed in standby mode after the conversion is complete. So it needs to come out of standby to power up and settle. Thus, the timing for the very first conversion will take longer than that in continuous conversion mode, approximately 128 modulator clocks. 

    May I know what is your filter type and programmed ODR? 

    Thanks,

    Jellenie

  • Hi JellenieR,
    Good to hear you again!

    The ODR = 16525 Hz the settling time (3 /ODR) = 192µs.
    The Fmod = 8MHz = 125ns.The time necessary to go out from standby mode is approx. 128 * Fmod = 16µs. On the scope screenshot the CS = 0 for about 38µs. This means the ADC has 38-16 = 22 µs for the conversion. I just did not wait long enough and the conversion speed was too slow in order to measure 128 data points at 35Hz (4480Hz).

    So, I set the ODR to the maximum 250 kSPS. I send the start single conversion command 0x018010 and here I wait for DOUT = 0. Once it happens (I have 32 TX interrupt time timeout) I send the 0x44 Read Data register command. And voila, everything works just fine.

    Thanks for your help. You – as always – put me on the right track.
    Marry Christmas and Happy(ier) New Year.

    Best regards,
    Louis

  • Hi, Louis.

    Great to hear this. You too have a great holiday and new year in 2022. 

    Regards,

    Jellenie