I have a question about GPIO CONFIGURATION REGISTER (0x06) for AD4111.
In the explanation of ERR_DAT on P52, there is a description about the input and the operation as a GPO, but there is no description in the open drain error mode.
If the bit is set to 10 in the explanation of ERR_EN, the result of the OR operation of the status register is inverted and reflected in the Error pin.
Is it okay to recognize that ERR_DAT reads back the status of the Error pin when ERR_EN is set to 10?
I would be grateful if you could reply.