[AD7768-4] IOVDD-Ciruitry & SPI-Voltages

Dear all,

I have a question regarding the IOVDD-ciruitry which is for me not clear from the data sheet.
What I understood is that there are two ways of using IOVDD:
            a)by supplying a voltage like 3,3V which leads to the usage of the internal LDO which generates 1,8V
            b) by externally using an LDO of 1.8V and shorting DREGCAP and IOVDD.
In this case I am using a) so I tied IOVDD to an external 3,3V rail. Is this correct?
What happens now, is that my SPI-voltages coming from the ADC (SDO (=MISO))  are 3.3V when I try to read a register value with a µC. However, if I take a look at the image below from the data sheet the internal LDO with 1.8V seems to supply all the SPI cricuits. Futhermore, the uC MOSI-SPI-voltages are only 1.8V high and the communication seems to work so far in one direction.
So the question is, am I doing anything wrong? How can I set the SPI-output voltages at SDO to 1.8V? Is there a way?

Thank you very much in advance
Best regards

Ben