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About ADUM7701 MCLK

Regarding MCLKIN, there is a description about the voltage rating in the data sheet, but is there a standard for tr / tf?
(It was about 8nS when measured, but is it a problem?(20MHz))

If you have any other points that you should be aware of, please teach me.

I look forward to your reply

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  • Hi,

          There isn't a fixed requirement for tr / tf but there are some datasheet parameters that you must adhere to. There are specifications of most interest here are the T4 and T3 minimum timing specifications and also the CMOS logic thresholds VIH and VIL.

           These specifications are dependent on the MCLK Frequency as well as the VDD2 Logic level that is being used. If I take the example, illustrated below, of VDD2 = 5V and MCLK = 20MHz (assuming a 50:50 duty cycle) it would imply that you need 0.1x TMCLK, or 5nS to transition from High to Low threshold and Low to High threshold.

           So if you are indeed measuring your tr and tf from the same thresholds then you you may not be meeting the T3 and T4 specifications for 20MHz.

                       

Reply
  • Hi,

          There isn't a fixed requirement for tr / tf but there are some datasheet parameters that you must adhere to. There are specifications of most interest here are the T4 and T3 minimum timing specifications and also the CMOS logic thresholds VIH and VIL.

           These specifications are dependent on the MCLK Frequency as well as the VDD2 Logic level that is being used. If I take the example, illustrated below, of VDD2 = 5V and MCLK = 20MHz (assuming a 50:50 duty cycle) it would imply that you need 0.1x TMCLK, or 5nS to transition from High to Low threshold and Low to High threshold.

           So if you are indeed measuring your tr and tf from the same thresholds then you you may not be meeting the T3 and T4 specifications for 20MHz.

                       

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