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AD7771 Recommended for New Designs
The AD7771 is an 8-channel, simultaneous sampling analog-to-digital converter (ADC). Eight full Σ-Δ ADCs are on-chip. The AD7771 provides an ultralow...
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AD7771 on Analog.com

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AD7771 MEMMAP_CRC_ERR problem



		

			

									
					    cdusan
					
							

			
				
									
											
			
			
				
    
			
			
			    	
			                    
                
				                on Aug 18, 2021 
				
			
			
		
    

				
		
    
		    		    
		    
		    	
			
    Hello,
    

    I use an AD7771 in SPI control mode and read the output data over DOUT0-DOUT3 pins.
    

     
    

    ADC data seem to make sense, however, in the header ALERT bit is always set to 1.
    

     
    

    The MEMMAP_CRC_ERR bit in GEN_ERR_REG_1 register seems to be set to 1 after I do the initialisation.
    

    Here is my Memory Map after reset on the left side and after initialisation on the right.
    

     
    

    The MEMMAP_CRC_ERR disappears if I set bit AD7779_MEMMAP_CRC_TEST_EN in AD7779_REG_GEN_ERR_REG_1_EN register to 0 during the initialisation.
    

    I tried the same with a brand new AD7771FMCZ board to no avail.
    

    What am I doing wrong? Could you please help me?
    

    

    Thanks in advance,
    

    Dusan
    

    

    Hardware in use: EVAL-AD7771FMCZ (Evaluation board for AD7771) and NUCLEO F429IZ
    
									
			        
		
    

				
						
        

    
    Tags: 
                                            
                 MEMMAP_CRC_ERR
                
                                                    
                 Simultaneous Sampling A/D Converters
                
                                                    
                 ad7771
                
                                                    
                 Precision A/D Converters
                
                                
            
    
    
    

		
    
			
						
									
									
						
						
			
			
			
			
		
    

        
        

					
    
			
    


    
















    
	
    
	
    
					



			








	
	
	
	



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      •  Analog Employees  
      
            
						
                            
            
            				
            
                on Aug 18, 2021 8:29 AM
            
            
					
      
	
      

		
		
      
					
      Hi Dusan,
      

      Is the MEMMAP_CRC_ERR permanently asserted, after initialization?
      

      I mean, if you read it after power up, it was enabled, ok. But after some delay, if you read it again, is it still set or has it cleared itself? If you keep operating the device, does it ever assert again or is it only during power up?
      

      Regards.
      

      Lluis.
      
			
      

		
			
	      

		
		
	
      
	
      
		
      
			
		
      
	
      
	
      
		
						
						
				
						
				
				
		
		
      
			
		
      
	
      

      

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													0
							
			
				
									
							        
			
			
			
        
            
						
                            
            
            				
            
                on Aug 18, 2021 8:41 AM
            
            
												
						in reply to Lluis
					
									
        
	
        

		
		
        
					
        Hi Lluis,
        

        Is the MEMMAP_CRC_ERR permanently asserted?
        

        - Yes. We checked Alert pin with osciloscope. The pin is after initialisation after setting the decimation rate always high.
        

         
        

        Thanks for your quick response.
        

        

        Regards,
        

        Dusan
        
			
        

		
			
	      

		
		
	
        
	
        
		
        
			
		
        
	
        
	
        
		
						
						
				
						
				
				
		
		
        
			
		
        
	
        

        

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													0
							
			
				
									
							        
			
			
			
        •  Analog Employees  
        
            
						
                            
            
            				
            
                on Aug 25, 2021 4:42 AM
            
            
												
						in reply to cdusan
					
									
        
	
        

		
		
        
					
        Hi Dusan,
        

        I didn´t mean the pin, I meant the bit on the memory map (0x059[5]). Does it clear itself when reading? Does it clear itself if you issue a RESET?
        

        You said it clears when you disable (AD7779_MEMMAP_CRC_TEST_EN) it during initialization, how about if you re-enable AD7779_MEMMAP_CRC_TEST_EN? Would that trigger 0x059[5] again?
        

        Regards,
        

        Lluis.
        
			
        

		
			
	      

		
		
	
        
	
        
		
        
			
		
        
	
        
	
        
		
						
						
				
						
				
				
		
		
        
			
		
        
	
        

        

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													0
							
			
				
									
							        
			
			
			
          
            
						
                            
            
            				
            
                on Sep 7, 2021 10:49 AM
            
            
												
						in reply to Lluis
					
									
          
	
          

		
		
          
					
          Hi Lluis,
          

          Does it clear itself when reading? NO.
          

          Does it clear itself if you issue a RESET? YES.
          

          How about if you re-enable AD7779_MEMMAP_CRC_TEST_EN? Would that trigger 0x059[5] again? YES
          

          Regards,
          

          Dusan
          
			
          

		
			
	      

		
		
	
          
	
          
		
          
			
		
          
	
          
	
          
		
						
						
				
						
				
				
		
		
          
			
		
          
	
          

          

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													0
							
			
				
									
							        
			
			
			
          •  Analog Employees  
          
            
						
                            
            
            				
            
                on Sep 7, 2021 11:21 AM
            
            
												
						in reply to cdusan
					
									
          
	
          

		
		
          
					
          Hi dusan,
          

          Sorry for another question. But just to make clear. If you do this sequence:
          

          -power up
          

          -read the memap flag is on
          

          -read the flag --> persist on
          

          -disable and re-enable the flag --> persist on
          

          -reset the devices --> flag clears
          

          Will it ever get asserted again after the reset? note a hardware reset generated by pulsing the RESET pin at power-up is required to guarantee that the digital block initializes correctly.
          

          Have you tried issuing that reset first thing after power up, before doing any memory map access?
          

          Regards,
          

          Lluis.
          

          
			
          

		
			
	      

		
		
	
          
	
          
		
          
			
		
          
	
          
	
          
		
						
						
				
						
				
				
		
		
          
			
		
          
	
          

          

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													0
							
			
				
									
							        
			
			
			
            
            
						
                            
            
            				
            
                on Sep 8, 2021 6:31 AM
            
            
												
						in reply to Lluis
					
									
            
	
            

		
		
            
					
            Hi Lluis,
            

            after power up (connected to power) all registers are read as zero.
            

            After reset (using reset pin) the values of registers 0x59 and 0x5A 
             
            


             
            


            They do not change after subsequent readings.
            We disable the flag (MEMMAP_CRC_TEST_EN) and MEMMAP_CRC_ERR is 0 (0x59: 00000000).
            We enable the flag (MEMMAP_CRC_TEST_EN) and MEMMAP_CRC_ERR is 0 (0x59: 00000000).
            After a reset (using reset pin) the registers are as follows:
             

            We guess, we are doing the initialisation somehow wrong (althoug the data seem to make sense).
            The difference in register map after reset and after initialisation are as follow:
            

             
            
			
            

		
			
	      

		
		
	
            
	
            
		
            
			
		
            
	
            
	
            
		
						
						
				
						
				
				
		
		
            
			
		
            
	
            

            

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            •  Analog Employees  
            
            
						
                            
            
            				
            
                on Sep 8, 2021 10:27 AM
            
            
												
						in reply to cdusan
					
									
            
	
            

		
		
            
					
            Hi cdusan,
            

            What is the difference between left column and write column? Left column is a register dump after a reset? Right is a register dump after doing several register writing (i.e. configuration)?
            

            When you say 'changed' you mean they changed themselves alone? Or some registers you have changed them while some others appear to have changed?
            

              

            • reg 0x011: you have changed the pwoer mode and refout buffer?
              • 

            • reg 0x059: memmap_crc_err has triggered
              • 

            • reg 0x05B: ext_mclk_switch_err has cleared. that´s expected. it turns on at power up, if the switchover was correct, but subsequent readings will show with this bit cleared
              • 

            • reg 0x05D: chip_error=1, because of the memap_crc
              • 

            • reg 0x05E: chip_error=1, because of the memap_crc, err_loc_gen1=1 because memap_crc too
              • 

            • reg 0x05F: chip_error=1, because of the memap_crc
              • 

            • reg 0x61: you have changed the SRC value so you aretrying to change the ODR
              • 

            

            After this, are you toggling the SRC_LOAD_UPDATE pin properly? If so, have you measured the DRDY signal frequency to verify the new ODR is properly set?
            

            If you now read again the register 0x59, will it still have the bit asserted?
            

            If you change your procedure, and remove the SRC write operation (0x61), will the memap_crc flag appear also?
            

            Regards,
            

            Lluis.
            
			
            

		
			
	      

		
		
	
            
	
            
		
            
			
		
            
	
            
	
            
		
						
						
				
						
				
				
		
		
            
			
		
            
	
            

            

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													0
							
			
				
									
							        
			
			
			
              
            
						
                            
            
            				
            
                on Sep 15, 2021 6:50 AM
            
            
												
						in reply to Lluis
					
									
              
	
              

		
		
              
					
              Hi Lluis,
              

              What is the difference between left column and write column? Left column is a register dump after a reset? Right is a register dump after doing several register writing (i.e. configuration)?
              

              Yes. Left column is after reset (before reset all is 0). Right is after the initialisation.
              

              When you say 'changed' you mean they changed themselves alone? Or some registers you have changed them while some others appear to have changed?
              

              It is a mix. Some registers we do write directly. Some changes happen out of our control (e.g. MEMMAP_CRC_ERR).
              

              reg 0x011: you have changed the pwoer mode and refout buffer?
              

              Yes.
              

              reg 0x05B: ext_mclk_switch_err has cleared. that´s expected. it turns on at power up, if the switchover was correct, but subsequent readings will show with this bit cleared
              

              Precisely.
              

              reg 0x61: you have changed the SRC value so you aretrying to change the ODR
              

              Yes.
              

              After this, are you toggling the SRC_LOAD_UPDATE pin properly? If so, have you measured the DRDY signal frequency to verify the new ODR is properly set?
              

              Yes we have. The measured frequency is as expected (128 kHz).
              

              If you now read again the register 0x59, will it still have the bit asserted?
              

              Unfortunatelly, yes.
              

              If you change your procedure, and remove the SRC write operation (0x61), will the memap_crc flag appear also?
              

              Unfortunatelly, yes.
              
			
              

		
			
	      

		
		
	
              
	
              
		
              
			
		
              
	
              
	
              
		
						
						
				
						
				
				
		
		
              
			
		
              
	
              

              

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													0
							
			
				
									
							        
			
			
			
              •  Analog Employees  
              
            
						
                            
            
            				
            
                on Sep 16, 2021 8:29 AM
            
            
												
						in reply to cdusan
					
									
              
	
              

		
		
              
					
              Hi dusan,
              

              Ok, so all registers in the memory map are at its expected value if I understand correctly. So that could potentially point that the issue happened on a bit within the non-user portion of the memory map.
              

              There is no way to clear the MEMMAP_CRC bit, so when it gets asserted the only solution is to reset the device and start the initialization again.
              

                

              • If you reset the device, do your initialization cycle again, will it always happen? 100% of the time?
                • 

              

              If yes, we may want to do one write at a time and see which write operation caused the memmap_crc bit to trigger (from your previous message I see you removed the SRC writing and the issue still happened).
              

              If we cannot narrow down to a given register write to be the culprit, that would mean device may have a problem and we will need to investigate this further offline. Have you tried any other EVAL-AD7771 boards or only one of them?
              

              Regards,
              

              Lluis.
              
			
              

		
			
	      

		
		
	
              
	
              
		
              
			
		
              
	
              
	
              
		
						
						
				
						
				
				
		
		
              
			
		
              
	
              

              

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													0
							
			
				
									
							        
			
			
			
              •  Analog Employees  
              
            
						
                            
            
            				
            
                on Sep 16, 2021 8:29 AM
            
            
												
						in reply to cdusan
					
									
              
	
              

		
		
              
					
              Hi dusan,
              

              Ok, so all registers in the memory map are at its expected value if I understand correctly. So that could potentially point that the issue happened on a bit within the non-user portion of the memory map.
              

              There is no way to clear the MEMMAP_CRC bit, so when it gets asserted the only solution is to reset the device and start the initialization again.
              

                

              • If you reset the device, do your initialization cycle again, will it always happen? 100% of the time?
                • 

              

              If yes, we may want to do one write at a time and see which write operation caused the memmap_crc bit to trigger (from your previous message I see you removed the SRC writing and the issue still happened).
              

              If we cannot narrow down to a given register write to be the culprit, that would mean device may have a problem and we will need to investigate this further offline. Have you tried any other EVAL-AD7771 boards or only one of them?
              

              Regards,
              

              Lluis.
              
			
              

		
			
	      

		
		
	
              
	
              
		
              
			
		
              
	
              
	
              
		
						
						
				
						
				
				
		
		
              
			
		
              
	
              

              

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													0
							
			
				
									
							        
			
			
			
                
            
						
                            
            
            				
            
                on Sep 17, 2021 11:16 AM
            
            
												
						in reply to Lluis
					
									
                
	
                

		
		
                
					
                If you reset the device, do your initialization cycle again, will it always happen? 100% of the time?
                

                Yes.
                

                 Have you tried any other EVAL-AD7771 boards or only one of them?
                

                Yes. We tried one other identical board. Same results.
                

                If yes, we may want to do one write at a time and see which write operation caused the memmap_crc bit to trigger (from your previous message I see you removed the SRC writing and the issue still happened).
                

                We did this. We edited ADC driver inserting a function that reads the GEN_ERR_REG_1.
                

                Here is part of the edited driver code (init function):
                

                 
                

                 
                /**
 * Initialize the device.
 * @param device - The device structure.
 * @param init_param - The structure that contains the device initial
 *               parameters.
 * @return SUCCESS in case of success, negative error code otherwise.
 */
int32_t ad7779_init(ad7779_dev **device,
            ad7779_init_param init_param)
{
    ad7779_dev *dev;
    uint8_t i;
    int32_t ret;

    dev = (ad7779_dev *)malloc(sizeof(*dev));
    if (!dev)
        return -1;

    /* SPI */
    ret = spi_init(&dev->spi_desc, &init_param.spi_init);

    /* GPIO */
    ret |= gpio_get(&dev->gpio_reset,
            &init_param.gpio_reset);
    ret |= gpio_get(&dev->gpio_mode0,
            &init_param.gpio_mode0);
    ret |= gpio_get(&dev->gpio_mode1,
            &init_param.gpio_mode1);
    ret |= gpio_get(&dev->gpio_mode2,
            &init_param.gpio_mode2);
    ret |= gpio_get(&dev->gpio_mode3,
            &init_param.gpio_mode3);
    ret |= gpio_get(&dev->gpio_dclk0,
            &init_param.gpio_dclk0);
    ret |= gpio_get(&dev->gpio_dclk1,
            &init_param.gpio_dclk1);
    ret |= gpio_get(&dev->gpio_dclk2,
            &init_param.gpio_dclk2);
    ret |= gpio_get(&dev->gpio_sync_in,
            &init_param.gpio_sync_in);
    ret |= gpio_get(&dev->gpio_convst_sar,
            &init_param.gpio_convst_sar);

    ret |= gpio_direction_output(dev->gpio_reset,
                     GPIO_LOW);
    mdelay(50);    // RESET Hold Time = min 2 x MCLK
    ret |= gpio_set_value(dev->gpio_reset, GPIO_HIGH);
    mdelay(50);    // RESET Rising Edge to First DRDY = min 225 us
    ret |= gpio_direction_output(dev->gpio_mode0,
                     GPIO_LOW);
    ret |= gpio_direction_output(dev->gpio_mode1,
                     GPIO_LOW);
    ret |= gpio_direction_output(dev->gpio_mode2,
                     GPIO_LOW);
    ret |= gpio_direction_output(dev->gpio_mode3,
                     GPIO_LOW);
    ret |= gpio_direction_output(dev->gpio_dclk0,
                     GPIO_LOW);
    ret |= gpio_direction_output(dev->gpio_dclk1,
                     GPIO_LOW);
    ret |= gpio_direction_output(dev->gpio_dclk2,
                     GPIO_LOW);
    ret |= gpio_direction_output(dev->gpio_sync_in,
                     GPIO_HIGH);
    ret |= gpio_direction_output(dev->gpio_convst_sar,
                     GPIO_HIGH);
    /* Device Settings */
    dev->ctrl_mode = init_param.ctrl_mode;
    dev->spi_crc_en = AD7779_DISABLE;
    dev->spi_op_mode = AD7779_INT_REG;
    dev->sar_state = AD7779_DISABLE;
    dev->sar_mux = AD7779_AUXAINP_AUXAINN;

    adc_utils_register_print(dev, AD7779_REG_GEN_ERR_REG_1, __FILE__, __LINE__);

    if ((dev->ctrl_mode == AD7779_SPI_CTRL) &&
        (init_param.spi_crc_en == AD7779_ENABLE)) {
        ret |= ad7779_spi_int_reg_read(dev,
                           AD7779_REG_GEN_ERR_REG_1_EN,
                           &dev->cached_reg_val[AD7779_REG_GEN_ERR_REG_1_EN]);
        ret |= ad7779_spi_int_reg_write_mask(dev,
                             AD7779_REG_GEN_ERR_REG_1_EN,
                             AD7779_SPI_CRC_TEST_EN,
                             AD7779_SPI_CRC_TEST_EN);
        dev->spi_crc_en = AD7779_ENABLE;
    }

    adc_utils_register_print(dev, AD7779_REG_GEN_ERR_REG_1, __FILE__, __LINE__);

    if (dev->ctrl_mode == AD7779_SPI_CTRL)
        for (i = AD7779_REG_CH_CONFIG(0); i <= AD7779_REG_SRC_UPDATE; i++)
            ret |= ad7779_spi_int_reg_read(dev, i, &dev->cached_reg_val[i]);

    adc_utils_register_print(dev, AD7779_REG_GEN_ERR_REG_1, __FILE__, __LINE__);

    for (i = AD7779_CH0; i <= AD7779_CH7; i++) {
        dev->state[i] = init_param.state[i];
        if (dev->ctrl_mode == AD7779_SPI_CTRL)
            ret |= ad7779_set_state(dev, (ad7779_ch)i, dev->state[i]);
    }

    adc_utils_register_print(dev, AD7779_REG_GEN_ERR_REG_1, __FILE__, __LINE__);

    for (i = AD7779_CH0; i <= AD7779_CH7; i++) {
        dev->gain[i] = init_param.gain[i];
        if (dev->ctrl_mode == AD7779_SPI_CTRL)
            ret |= ad7779_set_gain(dev, (ad7779_ch)i, dev->gain[i]);
    }

    adc_utils_register_print(dev, AD7779_REG_GEN_ERR_REG_1, __FILE__, __LINE__);

    dev->dec_rate_int = init_param.dec_rate_int;
    dev->dec_rate_dec = init_param.dec_rate_dec;
    if (dev->ctrl_mode == AD7779_SPI_CTRL)
        ret |= ad7779_set_dec_rate(dev, dev->dec_rate_int, dev->dec_rate_dec);

    adc_utils_register_print(dev, AD7779_REG_GEN_ERR_REG_1, __FILE__, __LINE__);

    dev->ref_type = init_param.ref_type;
    if (dev->ctrl_mode == AD7779_SPI_CTRL)
        ret |= ad7779_set_reference_type(dev, dev->ref_type);

    adc_utils_register_print(dev, AD7779_REG_GEN_ERR_REG_1, __FILE__, __LINE__);

    dev->pwr_mode = init_param.pwr_mode;
    if (dev->ctrl_mode == AD7779_SPI_CTRL)
        ret |= ad7779_set_power_mode(dev, dev->pwr_mode);

    adc_utils_register_print(dev, AD7779_REG_GEN_ERR_REG_1, __FILE__, __LINE__);

    if (dev->ctrl_mode == AD7779_PIN_CTRL) {
        ret |= ad7779_do_update_mode_pins(dev);
    }

    adc_utils_register_print(dev, AD7779_REG_GEN_ERR_REG_1, __FILE__, __LINE__);

    dev->dclk_div = init_param.dclk_div;
    ad7779_set_dclk_div(dev, dev->dclk_div);

    adc_utils_register_print(dev, AD7779_REG_GEN_ERR_REG_1, __FILE__, __LINE__);

    for (i = AD7779_CH0; i <= AD7779_CH7; i++) {
        dev->sync_offset[i] = init_param.sync_offset[i];
        dev->offset_corr[i] = init_param.offset_corr[i];
        dev->gain_corr[i] = init_param.gain_corr[i];
        if (dev->ctrl_mode == AD7779_SPI_CTRL) {
            ret |= ad7779_set_sync_offset(dev, (ad7779_ch)i,
                              dev->sync_offset[i]);
            ret |= ad7779_set_offset_corr(dev, (ad7779_ch)i,
                              dev->offset_corr[i]);
            ret |= ad7779_set_gain_corr(dev, (ad7779_ch)i,
                            dev->gain_corr[i]);
        }
    }

    adc_utils_register_print(dev, AD7779_REG_GEN_ERR_REG_1, __FILE__, __LINE__);

    *device = dev;

    if (ret == EC_OK)
        printf("AD7779 successfully initialized\r\n");
    else
        printf("AD7779 initialization error (%d)\r\n", (int) ret); // (RAST)

    return ret;
}
                

                init_param are:
                

                 
                

                Here are the results:
                

                 
                

                As you can see, MEMMAP_CRC_ERR appears after the ad7779_set_dec_rate function. If we skip this function MEMMAP_CRC_ERR appears after some other one (e.g. ad7779_set_power_mode) and so on.
                
			
                

		
			
	      

		
		
	
                
	
                
		
                
			
		
                
	
                
	
                
		
						
						
				
						
				
				
		
		
                
			
		
                
	
                

                

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													0
							
			
				
									
							        
			
			
			
                •  Analog Employees  
                
            
						
                            
            
            				
            
                on Sep 21, 2021 3:17 AM
            
            
												
						in reply to cdusan
					
									
                
	
                

		
		
                
					
                Hi dusan,
                

                Ok, checking I understood again: no matter how many registers you write nor which of them, MEMMAP_CRC_ERR will assert after the last register write operation? None of the previous register write asserted it.
                

                Have you tried opearting this two board with the software we provide? In order to see if it is a device issue or a consequence of your code. I have just run one board, with the eval board software. On power up, this flag is not asserted. I wrote the very same registers as you did, and I never got such flags asserted. 



                
    
                
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        after initialization.xml
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                <AD7770_Regmap>
     <REGISTER> 
          <UID>7432e7d8d769c34138b89fa06a82bc83d41df2b2</UID>
          <NAME>CH0_CONFIG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>1813cbd12e58e30fdeb423cd9146221caa2410af</UID>
          <NAME>CH1_CONFIG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>b4e91572e0702b0183b4fb546abcda98e7b4dc18</UID>
          <NAME>CH2_CONFIG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>589634982ed399105dc8c8cf37cc8520767e7438</UID>
          <NAME>CH3_CONFIG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>6ef28bab2c66f74de8f908926611f7823136a04b</UID>
          <NAME>CH4_CONFIG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>3dcef572463fc18cb7492ab5be6ff08c057f00ea</UID>
          <NAME>CH5_CONFIG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>eb728cc2a7c5e0c797b7e2f9ae5a96aade66cdfc</UID>
          <NAME>CH6_CONFIG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>eab8198bf640769f4c98e19547f019baa15b3e14</UID>
          <NAME>CH7_CONFIG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>303d2047e5b74d93553e151a31d2667cb97fd5f4</UID>
          <NAME>CH_DISABLE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>5133c5450c57f7d269c8df03f8307caa61e2c555</UID>
          <NAME>CH0_SYNC_OFFSET</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>cd76d82c9f850b44389bea527f76507e0d8036d5</UID>
          <NAME>CH1_SYNC_OFFSET</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>10793a3cadbbc630171959602043dd4db27ab5eb</UID>
          <NAME>CH2_SYNC_OFFSET</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>77aa8ca0ddfecb23e0001b9ac6905a1fb850d7b9</UID>
          <NAME>CH3_SYNC_OFFSET</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>2d0fef964d30963f3479af5c44b7c559fb8f6685</UID>
          <NAME>CH4_SYNC_OFFSET</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>e58acb0e315f509be03fbb7422ba7b1c49cafa9d</UID>
          <NAME>CH5_SYNC_OFFSET</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>24e13dfd005cfa1b1c6c27cbe2e8e99a7059dee4</UID>
          <NAME>CH6_SYNC_OFFSET</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>ae3f6073a6e6d371f893d95d666c84c91a117134</UID>
          <NAME>CH7_SYNC_OFFSET</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>373bf64b8a689335a08b60b68dfcf8881cfc8b8f</UID>
          <NAME>GENERAL_USER_CONFIG_1</NAME>
          <VALUE>0x74</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>c61974e113903f27b7946a2cbbd1069ada946130</UID>
          <NAME>GENERAL_USER_CONFIG_2</NAME>
          <VALUE>0x9</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>e1daeced817bab8152dd33df8f7c869d91717809</UID>
          <NAME>GENERAL_USER_CONFIG_3</NAME>
          <VALUE>0x80</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>1533d0c201741294009cd47b0db6f1cc587e3a5e</UID>
          <NAME>DOUT_FORMAT</NAME>
          <VALUE>0x20</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>e7be8a9a3d2d45bbe6f9fd137e9172bb86f965d7</UID>
          <NAME>ADC_MUX_CONFIG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>d62b8ad9a927efd55d4fb158371fcc89528fa7d5</UID>
          <NAME>GLOBAL_MUX_CONFIG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>2b431794de39145b961babf6d6d08436bd29d18b</UID>
          <NAME>GPIO_CONFIG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>83ce98072938d6c1024290b45469b60a2a1f261f</UID>
          <NAME>GPIO_DATA</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>682e43da29f60894349161a3778bcda24e45f5ca</UID>
          <NAME>BUFFER_CONFIG_1</NAME>
          <VALUE>0x38</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>d0d15bc70ec134af44f11b5510c4529e8642077c</UID>
          <NAME>BUFFER_CONFIG_2</NAME>
          <VALUE>0xC0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>dc58e48c359824dd237cc763738564b5e1614dc0</UID>
          <NAME>BUFFER_CONFIG_3</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>aa987a2af95caea79dae6cb94167ddc63598e9f6</UID>
          <NAME>CH0_OFFSET_UPPER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>e885955ecfb6a85934684777f31333571c0df177</UID>
          <NAME>CH0_OFFSET_MID_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>346a304b8f5bbf4b4b5a5d9828ba714ac3ba5d40</UID>
          <NAME>CH0_OFFSET_LOWER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>098a44ae4dd3f65e1e76366876819ee7569daa04</UID>
          <NAME>CH0_GAIN_UPPER_BYTE</NAME>
          <VALUE>0x55</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>64a25aadc1f012aa8ed70c49d63bdf46b8cd8e8f</UID>
          <NAME>CH0_GAIN_MID_BYTE</NAME>
          <VALUE>0x52</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>6d8b313555c8e1327d2f45263c44041c523a08f5</UID>
          <NAME>CH0_GAIN_LOWER_BYTE</NAME>
          <VALUE>0xD5</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>98661f26f3be9bbcfb1da84b59486374084c1313</UID>
          <NAME>CH1_OFFSET_UPPER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>08e08ceb8d25c3f0c3d6e6d23539c50e342d7501</UID>
          <NAME>CH1_OFFSET_MID_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>ac47f0f009319da9d8a8e020d9538d34f07940fe</UID>
          <NAME>CH1_OFFSET_LOWER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>b1beea222beb9fdc405a0145af2a921d4384a47b</UID>
          <NAME>CH1_GAIN_UPPER_BYTE</NAME>
          <VALUE>0x55</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>2e18ab97e487218677dd39c8091f298357ba19ea</UID>
          <NAME>CH1_GAIN_MID_BYTE</NAME>
          <VALUE>0x49</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>59b04f0b97f2835fc9b2297193a48ae3540785a9</UID>
          <NAME>CH1_GAIN_LOWER_BYTE</NAME>
          <VALUE>0xB5</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>21c6fce3c3743a56809d9edd193e12926f202381</UID>
          <NAME>CH2_OFFSET_UPPER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>f61546d1288bac910c725ae5ab2bf006c20bd232</UID>
          <NAME>CH2_OFFSET_MID_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>56183509c12b475db1625686db257be119f48804</UID>
          <NAME>CH2_OFFSET_LOWER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>af5adac070cc78dc9c32a4e882dac51553426df4</UID>
          <NAME>CH2_GAIN_UPPER_BYTE</NAME>
          <VALUE>0x55</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>07bd552761e71a1e51ebd8adcec643791981a8ff</UID>
          <NAME>CH2_GAIN_MID_BYTE</NAME>
          <VALUE>0x53</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>e544fa381423710443c4c79f39c38cbec9e81ada</UID>
          <NAME>CH2_GAIN_LOWER_BYTE</NAME>
          <VALUE>0xD5</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>12213aa8646540cd15c58a1604300b8e53fba8ae</UID>
          <NAME>CH3_OFFSET_UPPER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>38170fdcb2323eb54aa338e6699b6e03d298248f</UID>
          <NAME>CH3_OFFSET_MID_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>8eacbe3080ea497e4bfa27c1149b6ef7ae0adb73</UID>
          <NAME>CH3_OFFSET_LOWER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>cb4c32b44cf4588642aca37fa9fb408a38311bbc</UID>
          <NAME>CH3_GAIN_UPPER_BYTE</NAME>
          <VALUE>0x55</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>f7656ad04ee474fd5d0e3db9db8e753da5cb7c63</UID>
          <NAME>CH3_GAIN_MID_BYTE</NAME>
          <VALUE>0x54</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>8f85811a5cbce6e5fa9598b4356ffde77115f65e</UID>
          <NAME>CH3_GAIN_LOWER_BYTE</NAME>
          <VALUE>0xD5</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>2a68151d2a082ca53fa46cfcdcb6c89e2b62cbb3</UID>
          <NAME>CH4_OFFSET_UPPER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>20efccb423ec768f7f3b9124ebc647d407670863</UID>
          <NAME>CH4_OFFSET_MID_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>c8a4e37aff371182c622091fa5420d19b3612d07</UID>
          <NAME>CH4_OFFSET_LOWER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>5dd47161105413147f59341038147a6e9f5798d2</UID>
          <NAME>CH4_GAIN_UPPER_BYTE</NAME>
          <VALUE>0x55</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>00aac0e044a654ffafeee06b114f40aad151535f</UID>
          <NAME>CH4_GAIN_MID_BYTE</NAME>
          <VALUE>0x4E</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>3bf08cc901c1aba6c0ebf349ef5f4247f1e2312d</UID>
          <NAME>CH4_GAIN_LOWER_BYTE</NAME>
          <VALUE>0x35</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>ec43ba3188100bd09b218b70124ca25ad0924d13</UID>
          <NAME>CH5_OFFSET_UPPER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>fccf7185bb3a8a0b4bd088906c51c4c20857e469</UID>
          <NAME>CH5_OFFSET_MID_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>05201892fe7643dfd523a9dc2748bdb0fcd38b1d</UID>
          <NAME>CH5_OFFSET_LOWER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>1a1a2618f955233e9fe453c7e9909e9b17c22aab</UID>
          <NAME>CH5_GAIN_UPPER_BYTE</NAME>
          <VALUE>0x55</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>402f2a6cea3682e553cc80b19871ab421c933a75</UID>
          <NAME>CH5_GAIN_MID_BYTE</NAME>
          <VALUE>0x50</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>3f2964eb2e92315bfaf885472a35a3627809958a</UID>
          <NAME>CH5_GAIN_LOWER_BYTE</NAME>
          <VALUE>0xA5</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>0c15a4d4298dbd483f982aad607a3c6edd060bad</UID>
          <NAME>CH6_OFFSET_UPPER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>85eaf81a3684aff6c5338f3fd24a3484898d59b9</UID>
          <NAME>CH6_OFFSET_MID_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>ef2d85d3c3c3ed931c79ea3ccb8fbc0afa655bbe</UID>
          <NAME>CH6_OFFSET_LOWER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>163fa0b414e3e23cd4cef403a8966d8bc34fdb7b</UID>
          <NAME>CH6_GAIN_UPPER_BYTE</NAME>
          <VALUE>0x55</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>ee3e118f52ece83acf8d3032909347bc08bff62c</UID>
          <NAME>CH6_GAIN_MID_BYTE</NAME>
          <VALUE>0x55</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>1a71541f69b338be07ec0d199b2ba6fb67c2e460</UID>
          <NAME>CH6_GAIN_LOWER_BYTE</NAME>
          <VALUE>0x55</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>2c4b790d1364050db75210f2639fbe272da64e7b</UID>
          <NAME>CH7_OFFSET_UPPER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>622eefbe0d2ff54b554f0da479175bfd7ebcbf75</UID>
          <NAME>CH7_OFFSET_MID_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>613d5c49a43f4b2652a10f6403d9a54aaaf10cf3</UID>
          <NAME>CH7_OFFSET_LOWER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>120040d11a92552bf2cbb244c33e2ac8bf36d947</UID>
          <NAME>CH7_GAIN_UPPER_BYTE</NAME>
          <VALUE>0x55</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>3e8a30929175641ba5a0cae1eaa3b1e5d2f3db1c</UID>
          <NAME>CH7_GAIN_MID_BYTE</NAME>
          <VALUE>0x4E</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>c3d28d0721438e47e5dcc100c0439b1307b09663</UID>
          <NAME>CH7_GAIN_LOWER_BYTE</NAME>
          <VALUE>0x35</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>92934683303c4ca0e9402dbe4b06ec67a857335a</UID>
          <NAME>CH0_ERR_REG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>58a5dcc64418f917a37409c24bdae3df7a6499d9</UID>
          <NAME>CH1_ERR_REG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>dfc2f7b3b0875f849dc1c672bb94dbd961c3a582</UID>
          <NAME>CH2_ERR_REG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>ae5df61c705f157d06696c33c3dfc460eff07412</UID>
          <NAME>CH3_ERR_REG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>b693640327478055297ebe62ee08692b56f55159</UID>
          <NAME>CH4_ERR_REG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>91c9d358dfba6416d874ccf6e3c5daa0d96de88f</UID>
          <NAME>CH5_ERR_REG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>2038601de8d728aeb31a7ed73bcc4699a2bcafcc</UID>
          <NAME>CH6_ERR_REG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>0490f42aa9eb6b7c38b1ff1107cf711c30f36cdd</UID>
          <NAME>CH7_ERR_REG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>21ccbb47635c36197456f7b567d1e4731a03ffd9</UID>
          <NAME>CH0_1_SAT_ERR</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>4dfbdaa08e99f33486ba29b0e5c73104823dfb11</UID>
          <NAME>CH2_3_SAT_ERR</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>603449099021e16d7691e221ac1c489c0014090e</UID>
          <NAME>CH4_5_SAT_ERR</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>4a21e908ae7ee1566dacbc914f85363a2165b6e5</UID>
          <NAME>CH6_7_SAT_ERR</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>2717c08b86768610e3dc6bf7765fff889bfc0659</UID>
          <NAME>CHX_ERR_REG_EN</NAME>
          <VALUE>0xFE</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>d6d5b2a0ccc077b64ee952e26a53fcd1f5841c8a</UID>
          <NAME>GEN_ERR_REG_1</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>2accabc674dcd76aca9753739c49630ffb1bab33</UID>
          <NAME>GEN_ERR_REG_1_EN</NAME>
          <VALUE>0x3E</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>0867b102c7ae9fa38cba68e9f109496a3bb2700f</UID>
          <NAME>GEN_ERR_REG_2</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>b36c7417ee422ee628a11fffe4467cf94092c14e</UID>
          <NAME>GEN_ERR_REG_2_EN</NAME>
          <VALUE>0x3C</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>b33723bd34a2b11984e8497e355c8bfdc5ba7865</UID>
          <NAME>STATUS_REG_1</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>d1e559cf2085b63c6c947e969684d89279167545</UID>
          <NAME>STATUS_REG_2</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>268a38c0b4e350083ac03a24e74cc67c465d95cc</UID>
          <NAME>STATUS_REG_3</NAME>
          <VALUE>0x10</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>adf873a3fb305289edf288fe7f8fd38f74f16b78</UID>
          <NAME>SRC_N_MSB</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>699ca40a12119a6c521b1fac5c3049fabe8c5657</UID>
          <NAME>SRC_N_LSB</NAME>
          <VALUE>0x80</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>2da1ec5b6a448fd373f353864dac9faed7b09967</UID>
          <NAME>SRC_IF_MSB</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>9b64dab97567699bbea66a9fd46c2cd8be487052</UID>
          <NAME>SRC_IF_LSB</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>fba2e582a38d4ffebbff6f471f1bea453a369455</UID>
          <NAME>SRC_UPDATE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>


</AD7770_Regmap>
                

                





                
    
                
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                <AD7770_Regmap>
     <REGISTER> 
          <UID>7432e7d8d769c34138b89fa06a82bc83d41df2b2</UID>
          <NAME>CH0_CONFIG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>1813cbd12e58e30fdeb423cd9146221caa2410af</UID>
          <NAME>CH1_CONFIG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>b4e91572e0702b0183b4fb546abcda98e7b4dc18</UID>
          <NAME>CH2_CONFIG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>589634982ed399105dc8c8cf37cc8520767e7438</UID>
          <NAME>CH3_CONFIG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>6ef28bab2c66f74de8f908926611f7823136a04b</UID>
          <NAME>CH4_CONFIG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>3dcef572463fc18cb7492ab5be6ff08c057f00ea</UID>
          <NAME>CH5_CONFIG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>eb728cc2a7c5e0c797b7e2f9ae5a96aade66cdfc</UID>
          <NAME>CH6_CONFIG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>eab8198bf640769f4c98e19547f019baa15b3e14</UID>
          <NAME>CH7_CONFIG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>303d2047e5b74d93553e151a31d2667cb97fd5f4</UID>
          <NAME>CH_DISABLE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>5133c5450c57f7d269c8df03f8307caa61e2c555</UID>
          <NAME>CH0_SYNC_OFFSET</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>cd76d82c9f850b44389bea527f76507e0d8036d5</UID>
          <NAME>CH1_SYNC_OFFSET</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>10793a3cadbbc630171959602043dd4db27ab5eb</UID>
          <NAME>CH2_SYNC_OFFSET</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>77aa8ca0ddfecb23e0001b9ac6905a1fb850d7b9</UID>
          <NAME>CH3_SYNC_OFFSET</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>2d0fef964d30963f3479af5c44b7c559fb8f6685</UID>
          <NAME>CH4_SYNC_OFFSET</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>e58acb0e315f509be03fbb7422ba7b1c49cafa9d</UID>
          <NAME>CH5_SYNC_OFFSET</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>24e13dfd005cfa1b1c6c27cbe2e8e99a7059dee4</UID>
          <NAME>CH6_SYNC_OFFSET</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>ae3f6073a6e6d371f893d95d666c84c91a117134</UID>
          <NAME>CH7_SYNC_OFFSET</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>373bf64b8a689335a08b60b68dfcf8881cfc8b8f</UID>
          <NAME>GENERAL_USER_CONFIG_1</NAME>
          <VALUE>0x24</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>c61974e113903f27b7946a2cbbd1069ada946130</UID>
          <NAME>GENERAL_USER_CONFIG_2</NAME>
          <VALUE>0x9</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>e1daeced817bab8152dd33df8f7c869d91717809</UID>
          <NAME>GENERAL_USER_CONFIG_3</NAME>
          <VALUE>0x80</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>1533d0c201741294009cd47b0db6f1cc587e3a5e</UID>
          <NAME>DOUT_FORMAT</NAME>
          <VALUE>0x20</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>e7be8a9a3d2d45bbe6f9fd137e9172bb86f965d7</UID>
          <NAME>ADC_MUX_CONFIG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>d62b8ad9a927efd55d4fb158371fcc89528fa7d5</UID>
          <NAME>GLOBAL_MUX_CONFIG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>2b431794de39145b961babf6d6d08436bd29d18b</UID>
          <NAME>GPIO_CONFIG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>83ce98072938d6c1024290b45469b60a2a1f261f</UID>
          <NAME>GPIO_DATA</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>682e43da29f60894349161a3778bcda24e45f5ca</UID>
          <NAME>BUFFER_CONFIG_1</NAME>
          <VALUE>0x38</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>d0d15bc70ec134af44f11b5510c4529e8642077c</UID>
          <NAME>BUFFER_CONFIG_2</NAME>
          <VALUE>0xC0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>dc58e48c359824dd237cc763738564b5e1614dc0</UID>
          <NAME>BUFFER_CONFIG_3</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>aa987a2af95caea79dae6cb94167ddc63598e9f6</UID>
          <NAME>CH0_OFFSET_UPPER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>e885955ecfb6a85934684777f31333571c0df177</UID>
          <NAME>CH0_OFFSET_MID_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>346a304b8f5bbf4b4b5a5d9828ba714ac3ba5d40</UID>
          <NAME>CH0_OFFSET_LOWER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>098a44ae4dd3f65e1e76366876819ee7569daa04</UID>
          <NAME>CH0_GAIN_UPPER_BYTE</NAME>
          <VALUE>0x55</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>64a25aadc1f012aa8ed70c49d63bdf46b8cd8e8f</UID>
          <NAME>CH0_GAIN_MID_BYTE</NAME>
          <VALUE>0x52</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>6d8b313555c8e1327d2f45263c44041c523a08f5</UID>
          <NAME>CH0_GAIN_LOWER_BYTE</NAME>
          <VALUE>0xD5</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>98661f26f3be9bbcfb1da84b59486374084c1313</UID>
          <NAME>CH1_OFFSET_UPPER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>08e08ceb8d25c3f0c3d6e6d23539c50e342d7501</UID>
          <NAME>CH1_OFFSET_MID_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>ac47f0f009319da9d8a8e020d9538d34f07940fe</UID>
          <NAME>CH1_OFFSET_LOWER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>b1beea222beb9fdc405a0145af2a921d4384a47b</UID>
          <NAME>CH1_GAIN_UPPER_BYTE</NAME>
          <VALUE>0x55</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>2e18ab97e487218677dd39c8091f298357ba19ea</UID>
          <NAME>CH1_GAIN_MID_BYTE</NAME>
          <VALUE>0x49</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>59b04f0b97f2835fc9b2297193a48ae3540785a9</UID>
          <NAME>CH1_GAIN_LOWER_BYTE</NAME>
          <VALUE>0xB5</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>21c6fce3c3743a56809d9edd193e12926f202381</UID>
          <NAME>CH2_OFFSET_UPPER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>f61546d1288bac910c725ae5ab2bf006c20bd232</UID>
          <NAME>CH2_OFFSET_MID_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>56183509c12b475db1625686db257be119f48804</UID>
          <NAME>CH2_OFFSET_LOWER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>af5adac070cc78dc9c32a4e882dac51553426df4</UID>
          <NAME>CH2_GAIN_UPPER_BYTE</NAME>
          <VALUE>0x55</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>07bd552761e71a1e51ebd8adcec643791981a8ff</UID>
          <NAME>CH2_GAIN_MID_BYTE</NAME>
          <VALUE>0x53</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>e544fa381423710443c4c79f39c38cbec9e81ada</UID>
          <NAME>CH2_GAIN_LOWER_BYTE</NAME>
          <VALUE>0xD5</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>12213aa8646540cd15c58a1604300b8e53fba8ae</UID>
          <NAME>CH3_OFFSET_UPPER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>38170fdcb2323eb54aa338e6699b6e03d298248f</UID>
          <NAME>CH3_OFFSET_MID_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>8eacbe3080ea497e4bfa27c1149b6ef7ae0adb73</UID>
          <NAME>CH3_OFFSET_LOWER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>cb4c32b44cf4588642aca37fa9fb408a38311bbc</UID>
          <NAME>CH3_GAIN_UPPER_BYTE</NAME>
          <VALUE>0x55</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>f7656ad04ee474fd5d0e3db9db8e753da5cb7c63</UID>
          <NAME>CH3_GAIN_MID_BYTE</NAME>
          <VALUE>0x54</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>8f85811a5cbce6e5fa9598b4356ffde77115f65e</UID>
          <NAME>CH3_GAIN_LOWER_BYTE</NAME>
          <VALUE>0xD5</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>2a68151d2a082ca53fa46cfcdcb6c89e2b62cbb3</UID>
          <NAME>CH4_OFFSET_UPPER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>20efccb423ec768f7f3b9124ebc647d407670863</UID>
          <NAME>CH4_OFFSET_MID_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>c8a4e37aff371182c622091fa5420d19b3612d07</UID>
          <NAME>CH4_OFFSET_LOWER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>5dd47161105413147f59341038147a6e9f5798d2</UID>
          <NAME>CH4_GAIN_UPPER_BYTE</NAME>
          <VALUE>0x55</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>00aac0e044a654ffafeee06b114f40aad151535f</UID>
          <NAME>CH4_GAIN_MID_BYTE</NAME>
          <VALUE>0x4E</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>3bf08cc901c1aba6c0ebf349ef5f4247f1e2312d</UID>
          <NAME>CH4_GAIN_LOWER_BYTE</NAME>
          <VALUE>0x35</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>ec43ba3188100bd09b218b70124ca25ad0924d13</UID>
          <NAME>CH5_OFFSET_UPPER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>fccf7185bb3a8a0b4bd088906c51c4c20857e469</UID>
          <NAME>CH5_OFFSET_MID_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>05201892fe7643dfd523a9dc2748bdb0fcd38b1d</UID>
          <NAME>CH5_OFFSET_LOWER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>1a1a2618f955233e9fe453c7e9909e9b17c22aab</UID>
          <NAME>CH5_GAIN_UPPER_BYTE</NAME>
          <VALUE>0x55</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>402f2a6cea3682e553cc80b19871ab421c933a75</UID>
          <NAME>CH5_GAIN_MID_BYTE</NAME>
          <VALUE>0x50</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>3f2964eb2e92315bfaf885472a35a3627809958a</UID>
          <NAME>CH5_GAIN_LOWER_BYTE</NAME>
          <VALUE>0xA5</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>0c15a4d4298dbd483f982aad607a3c6edd060bad</UID>
          <NAME>CH6_OFFSET_UPPER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>85eaf81a3684aff6c5338f3fd24a3484898d59b9</UID>
          <NAME>CH6_OFFSET_MID_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>ef2d85d3c3c3ed931c79ea3ccb8fbc0afa655bbe</UID>
          <NAME>CH6_OFFSET_LOWER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>163fa0b414e3e23cd4cef403a8966d8bc34fdb7b</UID>
          <NAME>CH6_GAIN_UPPER_BYTE</NAME>
          <VALUE>0x55</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>ee3e118f52ece83acf8d3032909347bc08bff62c</UID>
          <NAME>CH6_GAIN_MID_BYTE</NAME>
          <VALUE>0x55</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>1a71541f69b338be07ec0d199b2ba6fb67c2e460</UID>
          <NAME>CH6_GAIN_LOWER_BYTE</NAME>
          <VALUE>0x55</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>2c4b790d1364050db75210f2639fbe272da64e7b</UID>
          <NAME>CH7_OFFSET_UPPER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>622eefbe0d2ff54b554f0da479175bfd7ebcbf75</UID>
          <NAME>CH7_OFFSET_MID_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>613d5c49a43f4b2652a10f6403d9a54aaaf10cf3</UID>
          <NAME>CH7_OFFSET_LOWER_BYTE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>120040d11a92552bf2cbb244c33e2ac8bf36d947</UID>
          <NAME>CH7_GAIN_UPPER_BYTE</NAME>
          <VALUE>0x55</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>3e8a30929175641ba5a0cae1eaa3b1e5d2f3db1c</UID>
          <NAME>CH7_GAIN_MID_BYTE</NAME>
          <VALUE>0x4E</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>c3d28d0721438e47e5dcc100c0439b1307b09663</UID>
          <NAME>CH7_GAIN_LOWER_BYTE</NAME>
          <VALUE>0x35</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>92934683303c4ca0e9402dbe4b06ec67a857335a</UID>
          <NAME>CH0_ERR_REG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>58a5dcc64418f917a37409c24bdae3df7a6499d9</UID>
          <NAME>CH1_ERR_REG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>dfc2f7b3b0875f849dc1c672bb94dbd961c3a582</UID>
          <NAME>CH2_ERR_REG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>ae5df61c705f157d06696c33c3dfc460eff07412</UID>
          <NAME>CH3_ERR_REG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>b693640327478055297ebe62ee08692b56f55159</UID>
          <NAME>CH4_ERR_REG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>91c9d358dfba6416d874ccf6e3c5daa0d96de88f</UID>
          <NAME>CH5_ERR_REG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>2038601de8d728aeb31a7ed73bcc4699a2bcafcc</UID>
          <NAME>CH6_ERR_REG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>0490f42aa9eb6b7c38b1ff1107cf711c30f36cdd</UID>
          <NAME>CH7_ERR_REG</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>21ccbb47635c36197456f7b567d1e4731a03ffd9</UID>
          <NAME>CH0_1_SAT_ERR</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>4dfbdaa08e99f33486ba29b0e5c73104823dfb11</UID>
          <NAME>CH2_3_SAT_ERR</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>603449099021e16d7691e221ac1c489c0014090e</UID>
          <NAME>CH4_5_SAT_ERR</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>4a21e908ae7ee1566dacbc914f85363a2165b6e5</UID>
          <NAME>CH6_7_SAT_ERR</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>2717c08b86768610e3dc6bf7765fff889bfc0659</UID>
          <NAME>CHX_ERR_REG_EN</NAME>
          <VALUE>0xFE</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>d6d5b2a0ccc077b64ee952e26a53fcd1f5841c8a</UID>
          <NAME>GEN_ERR_REG_1</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>2accabc674dcd76aca9753739c49630ffb1bab33</UID>
          <NAME>GEN_ERR_REG_1_EN</NAME>
          <VALUE>0x3E</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>0867b102c7ae9fa38cba68e9f109496a3bb2700f</UID>
          <NAME>GEN_ERR_REG_2</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>b36c7417ee422ee628a11fffe4467cf94092c14e</UID>
          <NAME>GEN_ERR_REG_2_EN</NAME>
          <VALUE>0x3C</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>b33723bd34a2b11984e8497e355c8bfdc5ba7865</UID>
          <NAME>STATUS_REG_1</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>d1e559cf2085b63c6c947e969684d89279167545</UID>
          <NAME>STATUS_REG_2</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>268a38c0b4e350083ac03a24e74cc67c465d95cc</UID>
          <NAME>STATUS_REG_3</NAME>
          <VALUE>0x10</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>adf873a3fb305289edf288fe7f8fd38f74f16b78</UID>
          <NAME>SRC_N_MSB</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>699ca40a12119a6c521b1fac5c3049fabe8c5657</UID>
          <NAME>SRC_N_LSB</NAME>
          <VALUE>0x80</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>2da1ec5b6a448fd373f353864dac9faed7b09967</UID>
          <NAME>SRC_IF_MSB</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>9b64dab97567699bbea66a9fd46c2cd8be487052</UID>
          <NAME>SRC_IF_LSB</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     <REGISTER> 
          <UID>fba2e582a38d4ffebbff6f471f1bea453a369455</UID>
          <NAME>SRC_UPDATE</NAME>
          <VALUE>0x0</VALUE>
     </REGISTER>
     
</AD7770_Regmap>
                

                


                
			
                

		
			
	      

		
		
	
                
	
                
		
                
			
		
                
	
                
	
                
		
						
						
						
						
				
				
		
		
                
			
		
                
	
                

                

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