Hello all,
I'm in the process of writing a software driver for an ADAS1000 and ADAS1000-2 ECG front end and I'm getting problems in the gang mode. I tested read frames in the master (ADAS1000) and all worked well but when i tried connect both the Configuration Status bit, off OPSTAT register, off slave (ADAS1000-2) is always busy. I confirmed that I've got the CLK_IO line with clock signal entring in the slave.
The registers that I'm using are:
ADAS1000 (master)
ECGCTL = 0xA004AA
CMREFCTL = 0xE07C0A
FRMCTL = 0x7FC40
(check PPL -> ready)
New Register ECGCTL = 0xA004AE // ADC activation
ADAS1000-2 (slave)
ECGCTL = 0xF000DE
CMREFCTL = 0x7804
FRMCTL = 0x7FC50
The steps of my code are:
1. Configure the ADAS1000
2. Configure the ADAS1000-2 + Activate the ADC of ADAS1000-2
3. Check the PPL status bit of ADAS1000-2
4. Check the PPL status bit of ADAS1000
5. Activate the ADAS1000 ADC
6. Read Frames
Do you have any idea of what the solution might be?
Best regards,
Samuel Heleno
