Post Go back to editing

Ad7380 adc data reading issue

Hi ,

we are using Ad7380 in 2 wire mode.

with 2 wire mode configuration ,we are able to see the output sine ,square and ramp  waveform  on iio scope with some glitches on upper and lower edges. we tried configuring the vref on device tree to 2.5v  and 3.3v ,but issue still persists.as we are feeding the input signal with  input voltage above 1.6v which is half of vref then we see  increase in noise in the output waveform.

any changes required in the hardware of ad7380(pullup resistors etc).please help us solve the issue .

sharing you the snapshot of  adc waveform.

Regards,

Shivashakar thati

  • Hi Shivashankar,

           What are two snapshots? The 1st one has some noise while the other has a smooth top edge. What is the difference between the two? Are these signals coming from the ADC? Please correct me if I am wrong, it looks like this signal is a clock. The AD7380 does not output a clock signal. The AD7380 receives an SCLK signal from a digital controller.

            If you are running in a high-speed SCLK frequency, this would also allow a high-speed throughput rate that clocks out high-speed data. When the AD7380 SDO pin has some length between the digital controller, this may affect the transmission of the data. In the AD7380 datasheet, it is recommended to place a 100-ohm resistor on the SDO pin. This will improve the transmission. 

    Regards,

    Jonathan