Problem reading data out of AD7606C-18

Hi,

I am trying to interface EVAL-AD7606CFMCZ to a Raspberry Pi Pico. I am having problem reading data out of the ADC. For a start, I tried reading the register address 0x2F which should return 0x31 for my board. But it is returning 0x00 (when CPHA is set to 0 which, from datasheet, I think is the setting that must be used) and 0x32 (when CPHA is set to 1. I was doubtful. So checked this too). I have attached two images, one with CPOL=0 and the other with CPOL=1, showing signals from DoutA (Green color signal in image), SCLK (Yellow). SDI (Purple) and CSn (Blue) pins.

I have written 0b01 10 1111 as suggested in the datasheet, to read the 0b101111 (0x2f) register. I am getting 0b00110010 (0x32). I should be getting 0b00110001 (0x31).


Fig.1 DoutA (Green), SCLK (Yellow). SDI (Purple) and CSn (Blue) when CPOL=1 and CPHA=1


Fig.2 DoutA (Green), SCLK (Yellow). SDI (Purple) and CSn (Blue) when CPOL=1 and CPHA=0

Please let me know if I have misunderstood anything or if I have done something wrongly.

Thanks.



Updated the signal bits
[edited by: Srivamsi at 11:58 AM (GMT -4) on 19 Jul 2021]
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  • 0
    •  Analog Employees 
    on Jul 21, 2021 3:46 AM

    Hi, 

    Apologies I'm quite confused with the statement and the attached scope. Are you getting 0x00 when CPHA=1 and CPOL=1? Can you confirm this please? I believe that is also the correct mode (SPI mode 3). 

    The attached scope Fig. 2 with 0x31 data read have a different phase compared to the datasheet. For Figure 1, the SCLK is continuous, can you try to provide it similar with Figure 2? 

    Thanks,

    Jellenie

  • Are you getting 0x00 when CPHA=1 and CPOL=1? Can you confirm this please?

    Sorry for the confusion. I am getting 0x00 with SPI mode3 (CPOL=1 and CPHA=1) and getting 0x32 (not 0x31 which is the expected output) with SPI mode2 (CPOL=1 and CPHA=0), when I read the 0x2f register.

    can you try to provide it similar with Figure 2? 

    I did not quite understand what you are requesting. Do you want me to provide continuous SCLK for Fig 2 case (SPI mode2) ? Or want me to provide two bursts of SCLK for Fig 1 case (SPI mode3), like it is in Fig 2 case.

    For Fig 1 case, I have written a 16-bit SPI read/write transaction, while for Fig 2 case, I wrote two 8-bit SPI read/write transactions.

    Anyway, I have tried different combinations and the outputs are as shown below.

    //Case 1
    //CPOL=1 CPHA=0
    //Single 16-bit SPI transactions
    Setting CONFIG register at 0x02 to 0x00
    Response after read 0x4200: 0x0
    Response after write 0x200: 0x0
    Response after read 0x4200: 0x0
    
    //Case 2
    //CPOL=1 CPHA=0
    //Two 8-bit SPI transactions
    Setting CONFIG register at 0x02 to 0x00
    Response after read 0x42 0: 0x0 0
    Response after write 0x2 0: 0x0 8
    Response after read 0x42 0: 0x0 0
    
    //Case 3
    //CPOL=1 CPHA=1
    //Single 16-bit SPI transactions
    Setting CONFIG register at 0x02 to 0x00
    Response after read 0x4200: 0x0
    Response after write 0x200: 0x0
    Response after read 0x4200: 0x0
    Response after read 0x4300: 0x0
    
    //Case 4
    //CPOL=1 CPHA=1
    //Two 8-bit SPI transactions
    Setting CONFIG register at 0x02 to 0x00
    Response after read 0x42 0: 0x0 0
    Response after write 0x2 0: 0x0 0
    Response after read 0x42 0: 0x0 0

    Only case 2 works. I now wonder why case 1 is not working.
    I also tried reading all the registers using the setup in case 2, and it works flawlessly. Below is the output.

    Response after read 0x41 0: 0x0 0	\\register 0x1
    Response after read 0x42 0: 0x0 8	\\register 0x2
    Response after read 0x43 0: 0x0 33	\\register 0x3
    Response after read 0x44 0: 0x0 33	\\register 0x4
    Response after read 0x45 0: 0x0 33	\\register 0x5
    Response after read 0x46 0: 0x0 33	\\register 0x6
    Response after read 0x47 0: 0x0 0	\\register 0x7
    Response after read 0x48 0: 0x0 0	\\register 0x8
    Response after read 0x49 0: 0x0 0	\\register 0x9
    Response after read 0x4a 0: 0x0 0	\\register 0xa
    Response after read 0x4b 0: 0x0 0	\\register 0xb
    Response after read 0x4c 0: 0x0 0	\\register 0xc
    Response after read 0x4d 0: 0x0 0	\\register 0xd
    Response after read 0x4e 0: 0x0 0	\\register 0xe
    Response after read 0x4f 0: 0x0 0	\\register 0xf
    Response after read 0x50 0: 0x0 0	\\register 0x10
    Response after read 0x51 0: 0x0 80	\\register 0x11
    Response after read 0x52 0: 0x0 80	\\register 0x12
    Response after read 0x53 0: 0x0 80	\\register 0x13
    Response after read 0x54 0: 0x0 80	\\register 0x14
    Response after read 0x55 0: 0x0 80	\\register 0x15
    Response after read 0x56 0: 0x0 80	\\register 0x16
    Response after read 0x57 0: 0x0 80	\\register 0x17
    Response after read 0x58 0: 0x0 80	\\register 0x18
    Response after read 0x59 0: 0x0 0	\\register 0x19
    Response after read 0x5a 0: 0x0 0	\\register 0x1a
    Response after read 0x5b 0: 0x0 0	\\register 0x1b
    Response after read 0x5c 0: 0x0 0	\\register 0x1c
    Response after read 0x5d 0: 0x0 0	\\register 0x1d
    Response after read 0x5e 0: 0x0 0	\\register 0x1e
    Response after read 0x5f 0: 0x0 0	\\register 0x1f
    Response after read 0x60 0: 0x0 80	\\register 0x20
    Response after read 0x61 0: 0x0 80	\\register 0x21
    Response after read 0x62 0: 0x0 0	\\register 0x22
    Response after read 0x63 0: 0x0 80	\\register 0x23
    Response after read 0x64 0: 0x0 0	\\register 0x24
    Response after read 0x65 0: 0x0 80	\\register 0x25
    Response after read 0x66 0: 0x0 0	\\register 0x26
    Response after read 0x67 0: 0x0 0	\\register 0x27
    Response after read 0x68 0: 0x0 0	\\register 0x28
    Response after read 0x69 0: 0x0 0	\\register 0x29
    Response after read 0x6a 0: 0x0 0	\\register 0x2a
    Response after read 0x6b 0: 0x0 0	\\register 0x2b
    Response after read 0x6c 0: 0x0 80	\\register 0x2c
    Response after read 0x6d 0: 0x0 0	\\register 0x2d
    Response after read 0x6e 0: 0x0 0	\\register 0x2e
    Response after read 0x6f 0: 0x0 32	\\register 0x2f

    So my main question is why am I getting 0x32 when I read 0x2f and getting all other register values correctly.

    The attached scope Fig. 2 with 0x31 data read have a different phase compared to the datasheet

    Also, I do not have the oscilloscope with me right now to check the signals in different cases mentioned above.

  • Thank you so much for the reply and info, Miss JellenieR.

    The 0x2F register is the ID register isn't it? and the last bits refer to silicon revision

    Yes, 0x2F corresponds to the Device ID register and the last two bits refer to its silicon revision.

    The product owner is currently on a leave so he can come back to you when he get back.

    Sure. No problem.

    the part uses SPI mode 3.

    Yes. Even I am surprised, after you mentioned I checked the data sheet again, and I do not know if it is mode 2 or 3. I also have some progress in my work (more at the bottom) that shows SPI mode 2 works perfectly.

    AD7606B/C ACE remote control [Analog Devices Wiki] Can you check if you can use this as a reference for your code? 

    This contains MATLAB programs, and I do not see any specific lines that would help. Could you please let me know if there are any that could help my work. I am actually trying to interface Arduinos or Raspberry Pis with the AD7606C-18, but the link provided uses the SDP-H Controller board, if I am not wrong.

    So, I tried performing the Interface check as mentioned in Page 52 of the AD7606C-18's data sheet. I have set the MSB of 0x21 register to enter Interface check mode and when I read the 8 channel voltage values, I got exactly the values shown in the Table 29 of the AD7606C-18's data sheet.
    Also, I tried reading all the registers from 0x01 to 0x2F and all of them read the values shown under the RESET column of table 32 of the AD7606C-18's data sheet, which indicates that my SPI interface is perfectly.

    I tried all this with SPI mode 2 which means that CPOL=1 and CPHA=0.

    I am currently trying to read the 8 voltages for the 8 channels (By exiting the Interface check mode, of course). But I am not successful. I am getting 0x00 or some garbage sometimes. I will look into it more and get back if I have any problems.

    Looking forward to the Product owner's reply.

  • 0
    •  Analog Employees 
    on Jul 26, 2021 3:24 AM in reply to Srivamsi

    Hi, 

    Yes, we will notify the product owner and he'll come back to you when he get back. He is on his annual leave so I think it will take another week before he return. 

    In terms of the sample code. The link also provided an mbed example code. I think this code uses SPI mode 2. So looks like that is indeed the correct mode. Apologies for confusion. I believe this code will also be able to help or assist you regarding the data capturing. 

    https://wiki.analog.com/resources/tools-software/product-support-software/ad7606_mbed_iio_application 

    I guess in terms of specific queries regarding the above example software code I can also redirect you to our software team. 

    Thanks,

    Jellenie 

  • +1
    •  Analog Employees 
    on Aug 2, 2021 9:48 AM in reply to JellenieR

    Hi all,

    0x32 is the expected value for AD7606C-18, but I am afraid the datasheet is outdated. Apologies for the confusion.

    Regards,

    Lluis.

  • Thank you so much for the update. That cleared a lot of things.

    I would like to point out one more thing. I am using serial interface mode in software mode, and I was unable to read the conversion results from the channels. I tried performing the Interface check and it worked fine, but when I try reading the conversion results, it returns 0x00.

    Then I looked into the No-OS driver program and found that I missed toggling CONVST signal before reading the analog channels. This confusion is caused by the figures like Fig.107 in data sheet. After including the toggling of CONVST before performing read operation, I am able to read the conversion results correctly.

    So, I request you to update it also accordingly.

  • 0
    •  Analog Employees 
    on Aug 2, 2021 10:55 AM in reply to Srivamsi

    Hi Srivamsi,

    Thanks for the feedback. There is a lot of diagrams in this datasheet, alright. Not all functionalities can be shown on every single diagram. The figure you refer to intended to show the data readback operation in serial interface. If you look at universal timing diagram, figure 2, this illustrate the reset conversion process you misunderstood. Apologies for the confusion.

    Regards,

    Lluis.

Reply
  • 0
    •  Analog Employees 
    on Aug 2, 2021 10:55 AM in reply to Srivamsi

    Hi Srivamsi,

    Thanks for the feedback. There is a lot of diagrams in this datasheet, alright. Not all functionalities can be shown on every single diagram. The figure you refer to intended to show the data readback operation in serial interface. If you look at universal timing diagram, figure 2, this illustrate the reset conversion process you misunderstood. Apologies for the confusion.

    Regards,

    Lluis.

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