AD7705 Why My dataOut is empty ?

Hello, i'm new with the AD7705 and when i lanch my program, i only see the when CS goes low...

i'm using a pic16f18344 (master) with a ad7705 (slave) in SPI communication

And here is my code : 

#define _XTAL_FREQ 16000000
#pragma config FEXTOSC = OFF // FEXTOSC External Oscillator mode Selection bits (Oscillator not enabled)
#pragma config RSTOSC = HFINT1 // Power-up default value for COSC bits (HFINTOSC (1MHz))
#pragma config CLKOUTEN = OFF // Clock Out Enable bit (CLKOUT function is disabled; I/O or oscillator function on OSC2)
#pragma config CSWEN = ON // Clock Switch Enable bit (Writing to NOSC and NDIV is allowed)
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable (Fail-Safe Clock Monitor is disabled)

#pragma config MCLRE = ON // Master Clear Enable bit (MCLR/VPP pin function is MCLR; Weak pull-up enabled)
#pragma config PWRTE = ON // Power-up Timer Enable bit (PWRT enabled)
#pragma config WDTE = OFF // Watchdog Timer Enable bits (WDT disabled; SWDTEN is ignored)
#pragma config LPBOREN = OFF // Low-power BOR enable bit (ULPBOR disabled)
#pragma config BOREN = ON // Brown-out Reset Enable bits (Brown-out Reset enabled, SBOREN bit ignored)
#pragma config BORV = HIGH // Brown-out Reset Voltage selection bit (Brown-out voltage (Vbor) set to 2.7V)
#pragma config PPS1WAY = OFF // PPSLOCK bit One-Way Set Enable bit (The PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence))
#pragma config STVREN = OFF // Stack Overflow/Underflow Reset Enable bit (Stack Overflow or Underflow will not cause a Reset)
#pragma config DEBUG = ON // Debugger enable bit (Background debugger enabled)

#pragma config WRT = OFF // User NVM self-write protection bits (Write protection off)
#pragma config LVP = OFF // Low Voltage Programming Enable bit (High Voltage on MCLR/VPP must be used for programming.)

#pragma config CP = OFF // User NVM Program Memory Code Protection bit (User NVM code protection disabled)
#pragma config CPD = OFF // Data NVM Memory Code Protection bit (Data NVM code protection disabled)

#include <xc.h>
#include <pic16f18344.h>
#include <stdint.h>

/////////// CAN ////////////
#include <math.h>
#define SCK RC0 //Serial Clock
#define SDI RC1 //Serial Data In
#define SD0 RC2 //Serial Data Out
#define SS RC3 //Slave Select: Not used in this application
#define DRDY RB6
#define RESET RB5
#define NUM_SAMPLES 1000 /* change the number of data samples */
#define MAX_REG_LENGTH 2 /* this says that the max length of a register is 2 bytes */

//modes de configs
#define ADC_NORMAL 0x00
#define ADC_SELF 0x40
#define ADC_ZERO_SCALE 0x80
#define ADC_FULL_SCALE 0xc0

//Réglages de gain
#define ADC_GAIN_1 0x00
#define ADC_GAIN_2 0x08
#define ADC_GAIN_4 0x10
#define ADC_GAIN_8 0x18
#define ADC_GAIN_16 0x20
#define ADC_GAIN_32 0x28
#define ADC_GAIN_64 0x30
#define ADC_GAIN_128 0x38

//Unipolaire ou Bipolaire
#define ADC_BIPOLAR 0x04
#define ADC_UNIPOLAR 0x00

//Fréquence d'envoi
#define ADC_50 0x04
#define ADC_60 0x05
#define ADC_250 0x06
#define ADC_500 0x07

uint8_t prems;
uint8_t deus;

void Init_Horloge(void){
//// HORLOGE ////
OSCCON1 = 96;//96+?


void CAN_Init(void)

SSPBUF = 0; // init buffeur spi
SS = 1; // Slave select init

//// PORTS SPI SENS ////
TRISC3 = 0; // Slave select en sortie
TRISC0 = 0; // SCK en sortie
TRISC1 = 1; // SDI en entrée
TRISC2 = 0; // SDO en sortie
TRISB6 = 1; // DRDY CAN en entrée
TRISB5 = 0; // RESET Sortie

//// SPI PPS ////
RC0PPS= 24; //Affectation sck
RC2PPS = 25; //Affectation sdo

//// SPI CONFIG ////
SSP1STAT = 128; // mesure millieu safe
SSP1CON1 = 34; //SPI enable + Mode maitre
SSP1CON3 = 16; //Autorisation overwrite

ADCON0 = 0 ; // Désactivation du CAN
ANSELB = 128;


//////////////////////// ECRITURE CAN /////////////////////

void write_adc_byte(uint8_t data)

SS = 0; // Activation Slave select
//RB7 = 0 ;

SSP1BUF = data;//envoi dans buffer
SSP1IF = 0; // doit être remis à 0 manuellement

//RB7 = 1;
SS = 1;// désactivation Slave select


//////////////////////// LECTURE CAN /////////////////////
uint8_t read_adc_word()
uint8_t data2_msb;
uint8_t data2_lsb;

while(DRDY ==1){}
SS = 0;

SSP1BUF = 0;
SSP1IF = 0;
data2_lsb= SSP1BUF; //envoi dans buffer

SSP1BUF = 0;
SSP1IF = 0;
data2_msb= SSP1BUF; //envoi dans buffer
SS = 1;

//while ( DRDY == 0 ){};

return data2_lsb;

void setup_adc_device(int calmode, int gainsetting, int operation, int rate)
write_adc_byte( 32 );//Registre de communications réglé pour écrire dans le registre d'horloge
write_adc_byte( 12 );//Registre d'horloge
write_adc_byte( 16 );//Registre de communications réglé pour écrire dans le registre de setup
write_adc_byte( 64 );//Registre de setup

//initailaization routine

void adc_init()
RESET = 0;//Etat bas reset
RESET = 1; //Etat haut reset
//setup_adc_device(ADC_SELF,ADC_GAIN_1,ADC_BIPOLAR,ADC_50); // Lancement config


void adc_disable()
write_adc_byte( 0x20 );
write_adc_byte( 0x10 );

//Convertir la valeur lue en volts
float convert_to_volts(long data){
return ((float)data*2.5/0xffff);

void main(void) {


RB7 = 0;


write_adc_byte( 32 );//Registre de communications réglé pour écrire dans le registre d'horloge
write_adc_byte( 7 );//Registre d'horloge
write_adc_byte( 16 );//Registre de communications réglé pour écrire dans le registre de setup
write_adc_byte( 64 );//Registre de setup (+56 pour gain max)

while(DRDY ==1){}


prems= read_adc_word();



My sending spi is good but i don' see any data into my dataout pin

PLS help

  • 0
    •  Analog Employees 
    on Jun 28, 2021 3:33 AM


    I am sorry I am not a coder. Can you send me a summarize register map settings? And I would recommend to try to readback other register settings to know if your SPI communication is working correctly. 

    Can you share your schematic/setup as well? Please probe and provide details on MCLK, supplies, reference voltage and input voltage.

    Another worth trying is upon power up, just pull /CS low and monitor the DRDY pin if it is pulsing at default ODR. Then try to change the ODR by writing to clock register, again monitor the DRDY pin with /CS low and see if it is now pulsing at the new selected ODR. 

    May I know also if this is for a new design? This is an old part and I would recommend to use our new products such as AD7124 which has all the building blocks plus more advanced features. 



  • He here is my setup for testing the AD7705 : 

    And if i let the CS pin low, DRDY don't pulse at default but if i use CS for sending commands DRDY can pulse normally

  • So now i try to read DOUT with 0x38 and it works ! Thanks ! 

    but i have the same thing at the last bit. I think that's because i'm using a breadboard and not a routed card 

    Should i make this problem in an other topic ?

    Thank you very much


  • 0
    •  Analog Employees 
    on Jul 2, 2021 1:30 AM in reply to CNAM

    Hi Thomas, 

    No, we can use this thread. I am not sure if that is normal. But might worth trying, can you just pull /CS low for example and see if the last bit will still be like that? The DOUT line I believe is disable when /CS is high so I am not sure if that's the reason. 



  • Hi,

    Sorry for the latency

    If just let CS low i had the same 

    and here is with cs 

    I have still the same at the end, don't you think that's because i'm using a breadboard ? sometimes behaves like a capacitor in high frenquency ? 

    My board : 

    Thank you

  • 0
    •  Analog Employees 
    on Jul 6, 2021 9:42 AM in reply to CNAM


    The DOUT pin is only driven by the ADC when outputting conversions. So, some period of time after the LSB has been output (Data hold time), the ADC no longer drives the DOUT pin. As the pin is no longer driven, the pin could have any value. It could decay as per your scope plot due to stray capacitance. If the LSB is zero, then DOUT may remain low until is is used again. 
    In your case, as the pin is not being driven, it could slowly decay to GND due to stray capacitance in your setup. This would give an exponential response as shown in the scope plot. The value of DOUT is irrelevant until the next conversion is output or a certain register is read and the pin is again driven by the ADC. 

  • Hi !

    Yes that's i thought too, so next time i will test this card into a routed card just to see.

    Also thank you  a lot for your support Slight smile

    Best regards 


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