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LTC2387-18 Shift Register Reset

Thread Summary

The user inquired about the procedure for resetting the ADC data bus and ensuring the shift register is initialized. The support engineer clarified that no specific reset procedure is needed; the shift register will automatically reset after the first two conversions post-power-up or exiting power-down, as long as the tcyc specification is met.
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Hi,

What is the intended procedure of resetting the ADC data bus? How do we make sure that the shift register used to clock out the data is reset to its initial value?

Does it happen somewhere during input acquisition? Or do I need to shift the test pattern to properly initialise the chip?

Thank you, 

Anton