AD7124 Always reads zero. RDY/IDLE bit is always 1

Hello,

I am trying to bring up an AD7124-8 to measure a 3-Write RTD. I have tried many configurations, but have not managed to read any values from the data register, nor banish all errors from the error register. 

All reads from the DATA register always return 0. All reads from the STATUS register always show the IDLE/RDY bit as high, and the error bit is high if I enable enough errors. 

Schematic

I have 1 PT100 RTD connected to the RTD1 input as pictured. All other RTDs connections are left floating. 

Voltage Measurements

REGCAPA = 1.92V

REGCAPD = 1.795V

REFIN+ - REFIN- = 1.21V

AIN2 - AIN1 = 398 mV

Register Dump

0x00,0x000000c0
0x01,0x00000081
0x02,0x00000000
0x03,0x00003505
0x04,0x00000000
0x05,0x00000014
0x06,0x00000080
0x07,0x0007fbda
0x08,0x00000000
0x09,0x00008022
0x0a,0x00000001
0x0b,0x00000001
0x0c,0x00000001
0x0d,0x00000001
0x0e,0x00000001
0x0f,0x00000001
0x10,0x00000001
0x11,0x00000001
0x12,0x00000001
0x13,0x00000001
0x14,0x00000001
0x15,0x00000001
0x16,0x00000001
0x17,0x00000001
0x18,0x00000001
0x19,0x000009e4
0x1a,0x00000860
0x1b,0x00000860
0x1c,0x00000860
0x1d,0x00000860
0x1e,0x00000860
0x1f,0x00000860
0x20,0x00000860
0x21,0x00060180
0x22,0x00060180
0x23,0x00060180
0x24,0x00060180
0x25,0x00060180
0x26,0x00060180
0x27,0x00060180
0x28,0x00060180
0x29,0x00800000
0x2a,0x00800000
0x2b,0x00800000
0x2c,0x00800000
0x2d,0x00800000
0x2e,0x00800000
0x2f,0x00800000
0x30,0x00800000
0x31,0x00554f25
0x32,0x00554f25
0x33,0x00554f25
0x34,0x00554f25
0x35,0x00554f25
0x36,0x00554f25
0x37,0x00554f25
0x38,0x00554f25

Any support is appreciated!

Parents
  • 0
    •  Analog Employees 
    on Jun 4, 2021 6:25 AM

    Hi, 

    Apologies. This is just a common steps I prefer to check if the ADC is converting and communicating properly with the MCU. Upon power up, can you pull /CS low and just monitor the DRDY pin if it is pulsing at correct ODR? 

    Once you see it is pulsing, can you try to change the ODR settings and then see again if it is now pulsing at the new ODR? Then you can also check if you configure the ADC correctly by writing and reading to the same register. Once you confirm that the ADC is converting and that the SPI interface is good. Then we can go to the hardware debugging.

    I'm sorry I'm kinda loaded now, but I will review this and come back to you if I find anything else. 

    Thanks,

    Jellenie

  • Hi Jellenie,

    I have powered on the ADC, pulled /CS low, and DOUT/RDY remains high. 

    I'm pretty sure something else is the issue. Maybe even the ADC is broken? I'd be surprised though.

    My reasoning is that when I communicate with the device, it appears to be functioning correctly.

    For example, the ID register reads back correctly. If I enable the MCLK_COUNT_EN bit in the ERROR_EN_REGISTER, the MCLK_COUNT register begins to update as expected. 

  • 0
    •  Analog Employees 
    on Jun 11, 2021 11:10 PM in reply to secret-engineer
    • Hi, 

    No. The selection of AIN or IOUT pins is flexible. The above configuration is the configuration we used on our circuit note. It is also the default configuration we have used with our firmware example codes that will be also release soon. There’s no harm in changing these but I think using exactly the same config or external components we have used will just make your life easy. 

    Thanks,

    Jellenie

  • I've just received my new board which in theory is exactly the same as the eval board. However, I'm still seeing ALDO_PSM_ERR set, even though the voltages look good, and similar to what I reported earlier.

    Any luck on replicated the issue on your end?

  • 0
    •  Analog Employees 
    on Jul 30, 2021 4:01 AM in reply to secret-engineer

    Hi, 

    Yes, we have tested this on our side and we do not see this issue. The ALDO_PSM_ERR or DLDO_PSM_ERR does not flag since we have a valid LDO output of 1.9V and 1.8V respectively. Just a quick question, can you check if you also enabled the ALDO_PSM_TRIP_TEST_EN? Because if you do this will automatically set the ALDO_PSM_ERR bit as this is intended to check the power supply monitoring, so the input to the test circuitry is GND rather than the actual LDO output which makes the error bit flag. 

    Thanks,

    Jellenie

  • I checked my ERROR_EN bits, and was in fact setting the ALDO_PSM_TRIP_TEST_EN bit.

    I cleared that, and the error goes away.

    Now what I see is the !DRDY bit stay high, and DATA is always zero.  I

    VREF is 2.6V

    AIN1-AIN0 is 0.115 V

    LDO outputs are 1.9 and 1.8.

    I'll poke around and see if I can find out any other issues. 

  • 0
    •  Analog Employees 
    on Aug 2, 2021 1:31 AM in reply to secret-engineer

    Good to hear that it solved the issue. 

    As for the other concern. When Data is always 0 do you see any other errors flag? 

    May I know what's your gain setting for an input of 0.115V?

    It is interesting that the pin stays high but the Data is always 0. 

    Usually, when DOUT/RDY stops pulsing at any time and it stays high or low (even though the ADC is configured for continuous conversion mode), this indicates that the serial interface has become asynchronous (incorrect number of SCLK pulses, glitches on the SCLK line). 

    And when Data remains high or low is usually cause by invalid reference, overrange or underrange input voltage. 

    So again upon power up, with CS low, when you monitor the DRDY pin does it stay high or pulsing at correct ODR? Then again try to change the ODR by writing to the filter register then with /CS low monitor again the DRDY pin if it is pulsing at a new selected ODR. When you do this check please confirm that you have a valin reference and input voltage range. 

    Thanks,

    Thanks,

    Jellenie

Reply
  • 0
    •  Analog Employees 
    on Aug 2, 2021 1:31 AM in reply to secret-engineer

    Good to hear that it solved the issue. 

    As for the other concern. When Data is always 0 do you see any other errors flag? 

    May I know what's your gain setting for an input of 0.115V?

    It is interesting that the pin stays high but the Data is always 0. 

    Usually, when DOUT/RDY stops pulsing at any time and it stays high or low (even though the ADC is configured for continuous conversion mode), this indicates that the serial interface has become asynchronous (incorrect number of SCLK pulses, glitches on the SCLK line). 

    And when Data remains high or low is usually cause by invalid reference, overrange or underrange input voltage. 

    So again upon power up, with CS low, when you monitor the DRDY pin does it stay high or pulsing at correct ODR? Then again try to change the ODR by writing to the filter register then with /CS low monitor again the DRDY pin if it is pulsing at a new selected ODR. When you do this check please confirm that you have a valin reference and input voltage range. 

    Thanks,

    Thanks,

    Jellenie

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