AD7293 SPI Interfacing Issue

Hi Valerie,

I'm having some problems during configuring AD7293 with Controller board.

A few time ago I decided to analyze SPI configuration data sent by EVAL-SDP-CB1Z to Eval-AD7293SDZ. I found that! there are two 24 bit sets of SPI data pulses sent by EVAL-SDP-CB1Z to EVAL-AD7293SDZ, both sets are separated by ~2.5 ms of delay. First 24 bits are sent for setting Registers Page and second 24 bits are sent for setting/accessing Register/Sub Register Value. The screenshot for one set of 24 bit SPI data is shown in the Figure (Fig.1.) below.

Fig.1. One set of 24 bit SPI data pulses

Here, In Fig.1 one set of 24 bit data is further subdivided into three 8 bit sets of data, but in AD7293 datasheet all 24 bits are shown without any subdivision in Figure 56 on Page 73, as shown in figure (Fig.2) below.

Fig.2. Figure 56 on Page 73 from AD7293 datasheet

So, Here is my Question!!! Is it necessary to subdivide 24 bits into three sets of 8 bits data???

Parents
  • +1
    •  Analog Employees 
    on May 28, 2021 3:00 PM

    Hi Mudassar,

    The SPI frame does not need to be split into 8 bits of data. The scope plot you show in figure 1 is the way the SDP-B was configured. The below plot shows a AD7293 device read. The first 16 bits are to the page select pointer register (Pointing to Page number 0x02), the next is a 24 bit frame looking for the data in the DAC Snooze/Sleep 0 register (0x1F in the first 8 bits, followed by 16 bits NOP to clock out the data on DOUT). 

    As you can see the data is not split into 8 bit segments. 

    Hope that helps,

    Valerie

  • Dear Valerie,

    I have used 40 bit SPI module and it worked well! Following is the attached Output diagram for reading the Device ID.

    40 bit SPI test

    Here I had used more than 40 SCLK clock cycles but in actual 40 SCLK clock cycles are enough for complete operation. 40 clock cycles means 16 clock cycles for Page Select Pointer selection and 24 clock cycles for Registers read and write operation.

    Thanks for your quick response!!!!!

    Regards,

    Mudassar

Reply
  • Dear Valerie,

    I have used 40 bit SPI module and it worked well! Following is the attached Output diagram for reading the Device ID.

    40 bit SPI test

    Here I had used more than 40 SCLK clock cycles but in actual 40 SCLK clock cycles are enough for complete operation. 40 clock cycles means 16 clock cycles for Page Select Pointer selection and 24 clock cycles for Registers read and write operation.

    Thanks for your quick response!!!!!

    Regards,

    Mudassar

Children
No Data