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Inquiry about the timing characteristics of the AD7703

Hi all,

I am currently using an AD7703 in SEC Mode.
My question is based on "Figure 5a: SEC Mode Timing Diagram" and "Figure 17: Timing Diagram for SEC Mode".

For DB18 to DB0, I understand that the value of DBx becomes valid after t14 from the falling edge of the previous SCLK.
In the case of DB0(LSB), when t14(max)=150 nsec and t16(typ.)=100 nsec, under the worst case condition, it seems to become Hi-Z before getting the value of DB0.

Please tell me the conditions under which SDATA becomes Hi-Z.

Best Regards,
Takahiro

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