Impact of the resolver cos/sin signal wobbling on the AD2S1210


I am using the AD2S1210 for the Tamagawa resolver.

I would like to know the impact of the cos/sin wobbling on the AD2S1210 angle and speed tracking performance.

As you can see in the attached screenshot, the blue is cosine and the green is sine.

Peaks of cosine and sine keep changing and the speed obtained from the AD2S1210 has a periodic ripple aligned with rotation frequency.

Is it an expected result?

  • 0
    •  Analog Employees 
    on Apr 15, 2021 11:47 AM


    Can you be more specific on your description of wobbling?   For example do you mean that the peak amplitude for the sin/cos outputs changes with fixed position or does it only change with rotation?   If it is the latter than that is expected behavior.   

    What you may want to look at is the relative mismatch in the SIN/COS outputs at odd multiples of PI/4 radians (45 degrees) to see if there is a relative amplitude mismatch in the channels.  Mismatch will cause some positional error to appear at the output which will show up as an error function which has an period of twice the rate of rotation.

    Some ripple in the angular velocity is expected as the loop filter that generates the velocity signal is not a perfect brick wall so it will be important to understand the peak magnitude of the ripple with respect to rate of rotation to understand if this is in tolerance or if there are other things you should investigate.   If you could share more details we can certainly help you work through these.


  • Hi Sean,

    First of all, thank you for your quick reply.

    The attached cos/sine signals were captured while rotating a resolver.

    As seen on the screenshot, the amplitude wobbling within the cosine signal is greater than the sine/cosine relative difference.

    Do you think the relative difference (cos/sine mismatch) has more impact on the angle and speed error than another?

    As you said, the speed ripple (green) was getting worsened as rotation speed increases.

    And it is out of our tolerance and I am working on resolver mounting to minimize the relative difference.

    But I would like to know how much relative difference is accepted in the AD2S1210 to get a clean angle and speed since it is not easy to mount the resolver without any tolerance.

    It would be appreciated that if we have a conference call to resolve this issue.

    Could you send me an email if we can do it?

  • 0
    •  Analog Employees 
    on Apr 15, 2021 8:11 PM in reply to mokona79


    The detail in your screen shot certainly helps me visualize your error in greater detail but there are a number of details related to your setup which would be important to allow us to completely resolve your issue.  

    One thing I would suggest before we proceed with a lengthy discussion is could you remove the resolver from mechanical setup and apply a fixed position mechanically?  The reason I ask is that I would like to decouple the electrical setup from the mechanical.   In this setup you'll need a means of maintain concentricity of the resolver rotor (if not already taken care of by the sensor housing) and then a means to mechanically lock the rotor in a known fixed position that we can change periodically.   What I would like to do with this setup is determine electrically if the stator signals (SIN/COS) make sense relative to what we see for positional error.   Once we have this dialed in we can take the resolver back to the full mechanical system and rotate at a known velocity and work out any other issues you might have. 

    In the interim if you have a local ADI Field Sales or Applications contact or if you work with distribution field sales they can get a conference call setup for you.  


  • Sean,

    Actually, I have the resolver test rig or fixture, and when I hooked up the RDC circuitry to that, the speed signal looks way better. Please see the attached scope screenshot.

    There is still cos/sin mismatch (420 mV), but the fault register doesn't report the DOS mismatch or over-range fault.

    So I would think I can still improve mechanical resolver mounting or I could modify opamp gains to match them.

    My question is how the mismatch impacts on the angle and speed measurement error and how much mismatch is allowed to get zero speed and angle error.

    And I have another question about the phase lock error. I already posted it separately.

    But I would like to copy and paste here to get your help.

    "I am using the AD2s1210 for the Tamagawa resolver.

    I measured phase shift from the excitation to cos/sin input and it was 46 deg.

    Even if I reset the fault, D1(phase lock error) was not cleared.

    Based on your answer, even though setting the phase lock range to 360 deg, the phase lock error will not be cleared, isn't it?

    And you said that "The remaining phase difference will cause additional inaccuracy."

    For example, the rotation rate is 100 Hz and the reference (excitation) frequency is 10 kHz, then an error will be 46 deg * 100/10000 = 0.46 deg, isn't it?

    Is it a constant angle offset when speed is fixed?

    If this is the case, I would think it could be compensated easily in the DSP.

    Please advise."


  • 0
    •  Analog Employees 
    on Apr 15, 2021 11:49 PM in reply to mokona79


    With regards to your original query you stated the following

    There is still cos/sin mismatch (420 mV), but the fault register doesn't report the DOS mismatch or over-range fault.

    Under what conditions did you measure the 420mV?  Were you at a static angle equal to an odd integer multiple of 45degrees?   You could also compare the peak amplitudes of each sin and cos inputs at 0,90,180 and 270 degrees and then use the formula in this paper that will allow you to estimate the peak positional error based on your mismatch.  As you will see the mismatch as a percentage of the peak amplitude determines the peak angular error.

    Based on your answer, even though setting the phase lock range to 360 deg, the phase lock error will not be cleared, isn't it?

    That is correct.   To clear the fault you will need to reduce the phase error through the excitation loop to less than +/-44 degrees.  Note this means adjusting the relative phase of the excitation output to the modulated carrier signal at the sin/cos outputs.   Does this mean that the resolver you are using adds 46 degrees of phase or do you have other circuits in series with the outputs that add additional errors at the carrier frequency?  Note that even with the phase reduced below the 44 degree threshold you will still have a residual error as described in the paper above (see equations 11, 12).  

    Is it a constant angle offset when speed is fixed?

    The fact that you are outside of the tracking limit means that the converter will lock-in to a quadrant which may be in error by up to 180degrees.  The amount of error is going to be dependent on a number of factors and thus I'd recommend you try to remove as much of the phase delay through the excitation path to the inputs as you possibly can.