LTC2500-32

Hi

I am testing averaging filter in LTC2500-32.

The test conditions are as follows.
- Preset Mode(PRE PIN '1', SDI '1') : Averaging filter, with DGC and DGE off
- MCLK : 2000sps
- DF : 20

I read the ADC value through SPI every 20 MCLKs using DRL interrupt.

The following is the data format read 7 times by 1 byte via spi.
[45][D5][2E][7C][4E][00][98]

- ADC value DA[31:0] : 0x45D52E7C
- Configuration Word WA[7:0] : 0x4E
- The number of samples averaged CO[13:0] : 0x0098 to 0x26 (decimal : 38)

1. Is configuration word 0x4E correct in averaging filter?
2. The averaged sample count should be sample 20 - 1 according to the datasheet. but the result is not.

Please tell me how to know if averaging filter is working properly.

Thank you..

  • 0
    •  Analog Employees 
    on Mar 12, 2021 9:55 PM

    When using the averaging filter, it is necessary to clock out 54 bits to get all of the data. The first 32 bits are the averaged ADC data, the next 4bits are the DF used to calculate the average, the next 4bits are the filter type (0111 for averaging) and the final 14bits are the actual number of samples taken - 1.

    When taking the average of 20 samples, the average will be the sum of the samples divided by 32, 

    Looking at your data, your results appear to be shifted 1 bit to the left.

    If you can provide an oscilloscope photo MCLK, SCKA, SDOA and DRL, I can confirm this.

  • Hi, ghoover

    Thank you for answer.

    The SPI mode was set to the falling edge. ADC data was sampled on the falling edge.
    After changing to a rising edge, the following results were obtained.

    [00][11][62][A2][27][00][4C]
    [00][11][C1][F6][27][00][4C]
    [00][10][F8][6C][27][00][4C]

    1. The averaged sample count : 20-1 ( 0x4C to 0x13)
    2. Filter type : 0111
    3. DF : 0010

    The averaged sample count and filter type seem to be correct. I think the DF should be 0101(32), not 0010(4). Am I right?

    Thank you..

  • 0
    •  Analog Employees 
    on Mar 15, 2021 4:30 PM in reply to domyst

    According to the information provided in Figure 44, DF should be 32 for 20 samples. Does the ADC output correspond to the analog input voltage provided to the ADC?

    Remember that according to Figure 29, the first sample after changing input voltages will not be the final value provided as the filter must settle. The averaging filter has the same settling as the SINC1 filter.

  • Does the ADC output correspond to the analog input voltage provided to the ADC?

    --> ADC digital output and analog input voltage match each other.

    In the case of 12Ksps (DF 128), 0x27 is the same. (DF:0010, Filter type:0111)

    Thank you.