I am connecting with an AD4003 using an FPGA and have already successfully gathered data using the 3-wire mode. However, I do not seem to be able to read back the status register (and perhaps I might not be writing correctly either). I have re-read the data sheet many times and have tried several timing changes that were not obviously stated in the data sheet but still I am unable to see any data on the SDO pin while reading the register. This image is from my simulator and has been confirmed with a scope as well. The SCK is running at 50MHz and the minimum time between any signal in this image is 20nS:
Write to status:
Not sure if these images are visible or not, but the top row is the SDO which I force in the simulator. Next line is CNV, next is SDI, next is SCK, and last is not critical for this question.
Thanks in advance!