I have LTC2326-16 bit ADC with VDD voltage as 5V and OVDD voltage as 3.3 v. I done my code as on start CNV i made it as HIGH when ever i get the BUSY has LOW then i am sending the 16 clock pulse SCK as 25 MHZ frequency . on falling edge of SCK i am trying to read the data . But I am facing the issue with BUSY pin. The BUSY pin is not moving to HIGH if it is HIGH only conversion has to be done. The BUSY pin i am getting always LOW . Please help me with this ?
Please find the above attachment for my connections ?
Can you provide an oscilloscope photo showing CNV and BUSY? Also, please measure VDDLBYP, REFIN and REFBUF.
Thank you for replay back to my query . Now i am able to get the the data BUSY pin has High and low .When ever if i make CNV has Raising edge the BUSY pin is moving to High . But if i supply 0v voltage to the ADC some conservation i am getting the FFDC and FFFF and 0000 bits . Is there any thing wrong what i am doing.
Please find the above attachment for my issues ? i given 0v to the ADC but i am getting the MISO line as above attachments .
Look at Figure 2 of the LTC2326-16 data sheet. The output of the ADC is encoded in 2's complement format. What you are seeing is normal performance.
Thank you for replay back to my query ..
I want to know about how to read the ADC values if we give 1khz sine -wave with amplitude of 6v . how many times i need to send the SPI clock and CNV to the ADC for reading one sine wave pulse (1 ms period .)
You do not say what your sample rate is. At 250ksps you will need 250 CNV pulses to capture the entire 1kHz waveform. For each CNV pulse you need 16 SPI clocks. With a sine wave of +6V to -6V you would expect to see a code of approximately 4B00 at the +peak and B500 at the -peak.