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AD7175-8 ID Register least significant 4 bits


I would like to confirm the value of the AD7175-8 ID Register value. In the AD7175-8 datasheet, the 16 bit ID is listed as "0x3CDx". There is no mention to what the lowest four bits should be represented by "x". I suspect these may change based on the silicon revision, but can you please confirm if this is the case as it is not clear in the datasheet?

Furthermore, when checking the ID register, would it be best to mask out the lowest four bits and just confirm the most significant 12 bits as 0x3CD?

Thank you!

  • Hi,

    The x is a don't care value. So yup you just need to confirm the first 12 bits. However, you should read/complete the read transaction of the ID register. The interface works by counting clocks on each data transfer. Therefore, if you are performing a write operation to one of the ADC’s 16-bit registers, 16 SCLK cycles must be applied to the ADC, and the converter will transfer in the 16 bits of data on the DIN line on each of the sixteen SCLK cycles. This happens regardless of which register has been accessed and whether a read or write operation has taken place. The ADC knows how many clock cycles should be in a transfer to/from a particular register and in this way knows when the transfer is complete.