Hi folks,
We are currently get DC919A-F evalution board from Digi-key. We control this board with Zedboard from Digilent. The clock, enable and data signal feed by Zedboard. We also use LTC6247 for Analog Front-End. The analog front-end section is designed by me, and it is simply an all pass filter. In the first tests,we get results we poor quality before we change data format of LTC2202 VDD to 2/3VDD. When we change the data format we get clear datas, but we get like oversampling by 2. For example, we gave 10khz sine wave from analog inputs and 10Mhz square wave from enc clock port we get 2000 samples for a sine, and we except that 1000. Is it any problem from our exception or any thing?
