AD7994 MODE1

Hi Hiroyuki,

1. Your description of MODE1 with four channels enabled is mostly correct, except assuming you are reading the data off the part via the I2C, then there will be the additional time required to read out each result per /CONVST frame. For example, if the address pointer is pointing to the conversion result register, then reading each result for each channel requires 18 SCL periods (to clock out the two bytes of data plus two ACK bits). So the time between each /CONVST is equal to (1us+2us+18*SCL), and the time to generate and read out ADC data for all four channels will be 4 times that.

2. The conversion result for each channel is two bytes long and is stored in the conversion result register. It is not necessary to read the same ADC result for a given channel twice, but you do need to read two bytes from the AD7994 I2C per channel in order to read the full contents of the conversion result register. So technically you only need to read the conversion result register 4 times to read out ADC results for all 4 channels, where each read is 2 bytes in length.

Hope that helps, let me know if you have any other questions.

Tyler

Hello Tyler,

Thank you very much for your support. I think perhaps it would be 1us+2us+27*SCL, because 7-Bit address should be included. Is it correct?

Regards,

Hiroyuki

No problem Hiroyuki,

The 7-bit address is actually only required to update the address pointer.

From page 26 in the data sheet:

"Once the register address has been set up, any number of reads can be performed from that particular register without having to write to the address pointer register again. If a read from a different register is required, the relevant register address has to be written to the address pointer register, and again, any number of reads from this register may then be performed."

In your example you would update the address pointer to point to the conversion result register. Once the address pointer is pointing to the conversion result register, then you can continue to repeat the 2-byte reads without needing to re-send the 7-bit address. This is also mentioned on page 28 of the data sheet.

So the sequence of events would be:

1. Write the 7-bit conversion result register address to address pointer (9xSCL)

2. Read the conversion result for VIN1 (18xSCL)

3. Read the conversion result for VIN2 (18xSCL)

4. Read the conversion result for VIN3 (18xSCL)

5. Read the conversion result for VIN4 (18xSCL)

6. return to (2) until you wish to stop reading conversion data

No problem Hiroyuki,

The 7-bit address is actually only required to update the address pointer.

From page 26 in the data sheet:

"Once the register address has been set up, any number of reads can be performed from that particular register without having to write to the address pointer register again. If a read from a different register is required, the relevant register address has to be written to the address pointer register, and again, any number of reads from this register may then be performed."

In your example you would update the address pointer to point to the conversion result register. Once the address pointer is pointing to the conversion result register, then you can continue to repeat the 2-byte reads without needing to re-send the 7-bit address. This is also mentioned on page 28 of the data sheet.

So the sequence of events would be:

1. Write the 7-bit conversion result register address to address pointer (9xSCL)

2. Read the conversion result for VIN1 (18xSCL)

3. Read the conversion result for VIN2 (18xSCL)

4. Read the conversion result for VIN3 (18xSCL)

5. Read the conversion result for VIN4 (18xSCL)

6. return to (2) until you wish to stop reading conversion data