What is system calibration and how is it implemented on the AD779x ?
System calibration allows the converter to compensate for external system gain and offset errors, as well as its own internal errors. Calibration is basically a conversion process on two specific input voltages (zero-scale or offset calibration, and full-scale calibration) from which the offset error coefficient and full-scale error coefficient are determined. With system calibration, the zero-scale voltage and full-scale voltage must be applied to the ADC by the user.
System calibration is a two-step process. The zero-scale point must be presented to the converter first. This voltage is applied to the analog input of the converter before the zero-scale system calibration step is initiated and must remain stable until the step is complete. System calibration is initiated by writing the appropriate values to the MD2, MD1, and MD0 bits of the mode register. The DRDY output from each device indicates when the step is complete by going low, or the mode bits can be monitored via software—these return to idle mode when calibration is complete. After the zero-scale point is calibrated, the full-scale point is applied; and the full-scale system calibration process is initiated by again writing the appropriate code to the MD bits. The full-scale voltage must be set up before the calibration is initiated and it must remain stable throughout the duration of the calibration. DRDY goes low at the end of this second step to indicate that the system calibration is complete.
The calibration procedure is dependent on whether unipolar mode or bipolar mode is used. In the unipolar mode, the system calibration is performed between the two endpoints of the transfer function; while in the bipolar mode, it is performed between midscale and positive full-scale.
When performing a system calibration, the zero-scale voltage and full-scale voltage must be switched into the analog input channel of the ADC. This can be performed by using a low RON SPDT (single-pole double-throw) CMOS switch. One of the switch inputs can be connected to the analog input, which represents the full-scale value, while the other input can be connected to the zero-scale voltage. Using this switch ensures that the signal chains on both analog inputs for the zero-scale calibration and full-scale calibration are identical. By so doing, the system zero-scale calibration will compensate for the insertion loss of the switch. The ADG736 is a dual SPDT switch with a RON < 4 Ω and matching of better than 0.4 Ω.
Hi sir i am working on AD7797 with AVDD = +Vref = 5V analog and AGND = -Vref = 0V analog ground. I have doubt on calibration.
RobK said:This voltage is applied to the analog input of the converter before the zero-scale system calibration step is initiated
On system calibration as you said above, what is the value "This" voltage. Also how i should connect physically can you explain with any diagram or schematic. Same for full scale. I am using only one channel AIN+ and AIN-. I am not getting how to apply differential voltage for zero and full scale calibration.
I tried measuring AVDD voltage, it is not coming correct. So i am going for calibration
My end application is to measure ratiometric output, where changes in output will be very less.
The AD7124 has lower noise and lower current consumption than the AD7797. It operates from a 3.6V max supply but is worth considering if using a 3V supply is acceptable for your design.
For the AD7124 and AD7797, the voltages must be applied to the ADC for the system calibrations. You have REF+ = AVDD and REF-=GND which is fine. With system calibrations, you can remove offset and gain errors external to the ADC also.
For the system zero scale calibration, apply a voltage representing your zero point to your system. If your design is a weighscale, for example, then have zero weight on the loadcell and perform the system zero scale calibration. For the system full scale calibration, apply the full weight to the loadcell.
The AD7797 has a fixed gain of 128. So, the signal for the system full scale calibration must be less than or equal to Vref/128 = 39 mV. Note that the minimum signal applied for the system full scale calibration must be 80% of Vref/gain which equals 31.25 mV.
The voltages on AIN+ and AIN- will depend on your system design. Again, using a weighscale design as an example, the voltage on AIN+ and AIN- will be close to AVDD/2 if the loadcell is excited by AVDD. With a full weight on the loadcell, there will be a differential signal which is biased about AVDD/2. Again, this is acceptable.
Thanks Mary, i understood. i like to know how i can sense differential input voltage of range (1.4V to 1.8V). What you explained i understood i can put maximum 39mV differential voltage and this i tested also with AD7797 it works. At 39mV it gives 24 bit max adc code.
My load cell is nothing but custom designed strain gauge Wheatstone bridge. Bridge excitation voltage = AVDD of AD7797 and GND = AGND. With this, the bridge differential output is 1.65V without any load.
This differential voltage i connected to AIN+ and AIN-.
Now how i can sense this voltage please explain. I am attaching my PCB schematic.
Complete PCB Schematic Suman