AD7683 and Sampling clock

Hi,

I need to know how to vary the sampling frequency of AD7683?

It is written that the sampling clock is internal.

I need to use this for 1KHz and 256Hz sampling,is this possible?

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  • 0
    •  Analog Employees 
    on Jun 16, 2011 1:12 AM

    I think Tim has already addressed some your concerns.

    First off, I'd recommend you to use the AD7685 for your application, which is a higher speed -250KSPS part with more functionality at the same price. It has two modes - CS mode and chain mode. It also has a BUSY signal indicator to interrupt the digital host and trigger the data reading.

    Keep in mind that a minimum of 22-clock cycles are required for AD7683 16-bit conversion and DOUT goes low on the DCLOCK falling edge following the LSB reading.

    Let me clarify that you can control the sample rate with CS and then serial clock has an effect of that in terms of conversion time.

    As I said before DCLOCK is an input of the AD7683, so you will have to provide an external clock. I wouldn't worry about the jitter here as this is a low-speed application. The internal clock mentioned in the datasheet is not an error. Usually there are two types of clocks in our SAR ADCs -one internally generated for the conversion and one applied externally to read back the data -both of them run asynchronously. The AD7683 doesn't have the capability to generate interrupt or BUSY signal.

    What's your end application?

    Regards,

    Maithil

Reply
  • 0
    •  Analog Employees 
    on Jun 16, 2011 1:12 AM

    I think Tim has already addressed some your concerns.

    First off, I'd recommend you to use the AD7685 for your application, which is a higher speed -250KSPS part with more functionality at the same price. It has two modes - CS mode and chain mode. It also has a BUSY signal indicator to interrupt the digital host and trigger the data reading.

    Keep in mind that a minimum of 22-clock cycles are required for AD7683 16-bit conversion and DOUT goes low on the DCLOCK falling edge following the LSB reading.

    Let me clarify that you can control the sample rate with CS and then serial clock has an effect of that in terms of conversion time.

    As I said before DCLOCK is an input of the AD7683, so you will have to provide an external clock. I wouldn't worry about the jitter here as this is a low-speed application. The internal clock mentioned in the datasheet is not an error. Usually there are two types of clocks in our SAR ADCs -one internally generated for the conversion and one applied externally to read back the data -both of them run asynchronously. The AD7683 doesn't have the capability to generate interrupt or BUSY signal.

    What's your end application?

    Regards,

    Maithil

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