Gain and offset errors compensation in ADC


It's the first time I'm using an ADC for an application with requirements of high accuracy and high resolution, and I have some questions. I'm currently using the evaluation kit EVAL-AD7634, which contains an AD7634 analog-to-digital converter.

Many academic and technical articles refer to the IEEE Standard 1057 (IEEE Standard for Digitizing Waveform Recorders), which states standard meanings for most of the specifications for ADC's and some standard methods to evaluate them. So I decided to use it as my main reference in this topic. The questions are:

1) Regarding to the definition of the Terminal-based gain and offset, their values are calculated using T[1] and T[2^N-1], which are the real first and last transition level (N: # of resolution bits from ADC). It states that these values should be located using one of the methods proposed in section 4.7 (static test, sine wave histogram, etc), which are methods to identify all transition levels from the full scale range.

At the moment, I'm interested to compensante just these two terminal-based errors, ignoring the other DC imprecisions (INL, DNL, etc). Because these are iterative methods and require some automation process and execution time, I thought if it would be really necessary to identify all transition levels iteratively. My idea was to perform only the steps a) to e) from the 4.7.1 Static Test Method for the first transition level, and then "mirror" these same steps sequence for the last transition level. In other words, steps a) and b) would be like:

a) Begin with k = 2^N-1.

b) Apply an input level slightly higher than the expected code transition level. For k = 2^N-1, begin with a value slightly higher than the maximum level recordable by the waveform recorder (e.g., 2% of the input range).

and proceed with the rest of the steps using the same idea.

Is this a good alternative method to identify T[1] and T[2^N-1], or I should expect some inaccuracy, compared with the iterative methods?

2) Because my input signal is single-ended, I'm using and Single-To-Differential driver made with op-amps AD8021, suggested in the AD7634 datasheet. When estimating the ADC parameters above discussed, is it a good pratice to driver the input signal through the Single-To-Differential op-amps (assuming that their offset and gain errors would be included in the overall estimation)? What are the cons and pros?

3) I've seen a lot of people that uses much more simpler methods to estimate gain and offset errors, like connecting the analog inputs from the ADC to the ground reference and voltage reference, and using the evaluated codes to compensate all sampled values. I think this would be much more simpler than the methods from IEEE 1057, but I imagine the results wouldn't have the same accuracy for two reasons:

     a) The offset code produced by grounding the analog inputs would be the zero offset error, but as I'm working in bipolar mode (-10V to +10V), these value would be conceptually wrong;

     b) My full scalce range is up to 10V, but my Vref is 5V. Combining its offset code with the zero offset value would provide slope value (gain), that could be much different from that produced fitting a line between T[1] and T[2^N-1].

Are my arguments correct? I'm really interested in this simpler solution, because features like auto-calibration would be my much more practical in my system.

4) Once I have the gain and offset errors, how should use them to compensate each input sample? I couldn't find an expression anywhere, but I imagine it would be something like:

     Vin[k]_corrected = Gain*Vin[k] + Offset,

where       Gain = (T[2^N-1]_ideal - T[1]_ideal)/(Testimated[2^N-1]_estimated - Testimated[1]_estimated)

               Offset = Tideal[1] - Gain*T[1]_estimated

Is this correct?

Best Regards,


  • 0
    •  Analog Employees 
    on Aug 14, 2012 9:42 PM over 8 years ago

    Hi Gabriel,

    For gain and offset calibration i would definitely include the SE to Diff stage as this will be a source of further error that will need calibration. The simplest way to calibrate without the need for an iterative process of finding exact code transitions would be to apply a known measured voltage at close to positive and negative fullscale. For example if you were to apply +9.95V and -9.95V (measured) volts at the input to the amplifier stage and read the resulting codes from the ADC you could use the following equations to calculate the gain and offset. This is for straight binary coding

                        Gain = (+9.95V - (-9.95V))/(PFS_code-NFS_code)

                        Offset = (-9.95V + 10V) - NFS_code* Gain

    then Vin could be calculated as

                        Vin = Code * Gain + Offset

    Hope this helps.


  • Hi Alan,

    Thank you for the answer!

    It's very clear to me, how simpler and handier your method is, compared to the iterative one from IEEE. But considering that my application requires high precision and accuracy, I'm not sure whether it would solve my problem properly, as I'm assuming the IEEE standard method could. Is there anything else you could state about it?

    Another question: what is the best way to calculate the compensation equation for Vin, in terms of loss of information inherent to the quantized operations: fixed-point ou floating-point?

    Thanks again!


  • 0
    •  Analog Employees 
    on Aug 15, 2012 7:35 PM over 8 years ago

    Hi Gabriel,

    I think if you use the method i describe and measure the input voltages exactly you will have pretty good accuracy. The main error is the fact you don't find the exact transition point for the codes that are read back and this could introduce up to a 1 lsb error in the offset number and gain error at fullscale. Is 1 lsb error sufficient? If you really want to push the accuracy then you can use the iterative measurement to find the exact voltage for first and last code transition and then use the equations as above.

    I'm not too sure on your fixed vs floating point question i think there are quite a few articles on that topic and you could also ask the question in the processor or DSP forum. When you are performing the calcs i think it's important to avoid very large or small numbers in intermediate steps so sequencing is important.

    Best Rgds,


  • Hi Alan,

    Thanks for the clarifying answer. I will try what you've suggested.

    My question about the fixed vs floating point was based exaclty in this problem with too small ou too large number in intermediate steps. So I will try somewhere else.

    Best Regards,