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AD7766-1 @ BF518 SPORT, data integrity issues


I have some odd behavior of AD7766-1 converter, being read from BF518's SPORT0. Please help me address the problem of the whole system's nonlinearity. Here're the details

1. I run slow sawtooth as test signal (F=0.01Hz), converter's signal is decimated to F's=8kHz. No anti-aliasing filter is used.

One of ADC's diff. inputs is connected to Vref/2 , the other is driven from signal generator. Generator's output is placed within the range of (Agnd...Vref). I use REF194 as voltage reference for the ADC.

The form of resulting signal is in the attachment (saw1.jpg). Note the saw is not smooth as it's supposed to be. I need to clarify if that's analog problem, or do I need to reconfigure BF518 firmware

2. I can't use SPI because it's already busy with some other hardware

3. SPORT connection to AD7766 is as follows





4. SPORT is being run in multichannel mode, AD7766's 24-bit data is represented as 8 channels, each being 3-bit wide. When data is read, it's then sent to 8-deep array of char's, after that 24-bit data is stitched together and represented as 32-bit signed integer (I populate bits 31-24 with value stored in ADC result's MSB, bit 23).

5. Serial clock frequency is set at 2.6 MHz to ensure all 24bits are read before the next ~DRDY pulse

6. AD7766's SYNC/PD pin is tied to Vdrive. Resetting the ADC by momentarily shorting SYNC pin to AGND (after the part is powered up) has no effect on data.

I tried both data readout modes available: the one with ~CS pin constantly tied to GND, and the other with CS controlled by host processor.

I noted that in ~CS=GND mode , data is switched at SDO pin at DRDY rising edge (not falling edge, as per part's datasheet)

I suppose the problem may be caused by the fact that host processor's serial clock output is not synchronous with DRDY pin, and clock output is continuous by the nature of SPORT hardware

Can I have some advice?