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AD7401 Bitstream

Hello Together,

we use the AD7401A for current measurement of our power inverter. The converters are supplied with a bootstrap circuit with the reference on the phase they are measured.An FPGA does the SIN3 Filter.

Everything works fine!

But now we found that we have a problem at startup. Sometimes the data output comming from the converter stuckes at high level.

So I´ve some questions about the clock-input: - Is it allowed to let it always activ, even when the converter is not supplied on the HV-side?

- Is there a minimum time we have to wait after power up the device on the HV-side, until the data-output is valid?

Thank´s in advance for help.



  • Hi Michael,

    It should not make a difference which power rail, Vdd1 or Vdd2 comes up first. Power supply sequencing tests would have been performed on the part. Also the very nature of the parts considering that the high voltage side is isolated from the low voltage side should mean that these parts are very robust when it comes to supply sequencing.

    If Vdd2 is powered up the data output should be valid almost immediately on power up of the Vdd1 supply.

    Does the output high persist until a restart of the power supplies or only for a period after power up?

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