code of the test pattern of   AD7960?

Hi Dmitriy,

The AD7960 generates an 18-bit pseudo random test pattern and to generate this pattern, you will need to power-up the AD7960 and set EN[3:0] = 0100. Then Initiate a conversion CNV± and run the CLK± at 200MHz (max up to 300MHz). The pseudo random generator is reset into a known state at the start of the first conversion. At the end of conversion, the pseudo random number is loaded into the LVDS block instead of the 18-bit conversion result. The pseudo random number can be read back the same way the conversion result is read back. To exit this mode, you'll need to change EN[3:0] from 0100 to any other combination mentioned in the datasheet (see Table 8).

Regards,
Maithil

Hi Dmitriy,

The AD7960 generates an 18-bit pseudo random test pattern and to generate this pattern, you will need to power-up the AD7960 and set EN[3:0] = 0100. Then Initiate a conversion CNV± and run the CLK± at 200MHz (max up to 300MHz). The pseudo random generator is reset into a known state at the start of the first conversion. At the end of conversion, the pseudo random number is loaded into the LVDS block instead of the 18-bit conversion result. The pseudo random number can be read back the same way the conversion result is read back. To exit this mode, you'll need to change EN[3:0] from 0100 to any other combination mentioned in the datasheet (see Table 8).

Regards,
Maithil