AD7859 Full Self-Calibration

I am having an issue getting the AD7859 to consistently perform a full self-calibration.

AVDD and DVDD are at 5V with a stable external 5V reference.

My clock is running at about 3.75MHz.

I do not see any activity on the CS.

About 1 out of every 25 times, when I pull the /CAL pin low for 10us and then release it back to 5V I do not see the BUSY line go high.

Because of this when my software goes to perform its first conversion, the chip does a calibration and my conversion fails.

Is there any documentation of using the /CAL pin to perform the full self-calibration as the datasheet only full explains using the /CONVST pin?

What are the potential reasons the full self-calibration did not start when the /CAL pin was taken from low to high?

Parents
  • 0
    •  Analog Employees 
    on Apr 7, 2014 10:32 PM

    Hi Mish,

    From the datasheet on p.22, self calibration timing section. To initiate self calibration, it needs to write to the control register and set the STCAL bit to 1. This should result to BUSY going Hi after writing to the control register and goes low when self calibration is complete. Please follow timing diagram ( fig. 29 of the datasheet) for self calibration.

    Maybe you can share to us the status  or snapshots of your pins during calibration ( like CS, WR, DATA and BUSY) and also the schematic diagram, so may we have a better understanding of the problem.

    Regards,

    Jonathan

Reply
  • 0
    •  Analog Employees 
    on Apr 7, 2014 10:32 PM

    Hi Mish,

    From the datasheet on p.22, self calibration timing section. To initiate self calibration, it needs to write to the control register and set the STCAL bit to 1. This should result to BUSY going Hi after writing to the control register and goes low when self calibration is complete. Please follow timing diagram ( fig. 29 of the datasheet) for self calibration.

    Maybe you can share to us the status  or snapshots of your pins during calibration ( like CS, WR, DATA and BUSY) and also the schematic diagram, so may we have a better understanding of the problem.

    Regards,

    Jonathan

Children
No Data