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the peripheral circuit of AD7278

Hello,

             now I use AD7278 as a part of my data acquisition system,all my peripheral circuit of AD 7278 is given in the follow image,I think there must be something wrong in my design,can you give me some advice?Thanks very much!!

Regards to all.

Thank you.

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  • Hello KarenNE,

           Do you think the AD7278 can work if I connect the peripheral circuit like the image I have attached above? What I wonder is that does the cs pin , sclk pin and the sddata pin need any pull-high resistor or capacity when be connected to the IO pins of FPGA?Or they can be connected to the IO pins of FPGA derectly? Thank you very much!!

             PS:I do think there's something wrong with the conversion results ,and I hope to conmunicate with you about that after I have a further study about it.

    Thanks a lot.

Reply
  • Hello KarenNE,

           Do you think the AD7278 can work if I connect the peripheral circuit like the image I have attached above? What I wonder is that does the cs pin , sclk pin and the sddata pin need any pull-high resistor or capacity when be connected to the IO pins of FPGA?Or they can be connected to the IO pins of FPGA derectly? Thank you very much!!

             PS:I do think there's something wrong with the conversion results ,and I hope to conmunicate with you about that after I have a further study about it.

    Thanks a lot.

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