I'm evaluating AD7684 ADC with true differential input at
5V supply and an external precision voltage reference of 4.096V.
It is piggy back mounted to an existing board of a running
series, firmware is adapted to its needs. Resolution of the
so far used ADC in the system is around 19bits sampling at 100Hz!
This preface should explain, that it is reasonable to
believe, that external factors should be very limited and
why or how I'm able to comfortably evaluate converted data
externally on a PC using Labview.
What strikes me most is the obvious "midscale error" around
digital code 0x0 when feeding the converter with an triangle
shaped ramp. The jump from 0mV to 2...3mV is equivalent
to about 16 ...24 LSB. This is far too much nonlinearity
for my needs.
Since there is no specification of the midscale error in the
data sheet explicitly, I didn't expect it.
It reads as follows:
INL: ±1 LSB typical, ±3 LSB maximum
Gain Error TMIN to TMAX: typ.±2 max.±15 LSB
Can anyone in the forum explain me what I may have missed during
Or does anyone know about this behaviour or the real
performance with this AD7684 converter?
Find attached in pictures both cases, old and new ADC
in respect to noise and midscale transition.
Thanks for reading,